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Fri, 04 Jun 2021 09:02:54 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id e27sm7421445wra.50.2021.06.04.09.02.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 09:02:53 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 322761FFCB; Fri, 4 Jun 2021 16:53:19 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v16 52/99] target/arm: rename handle_semihosting to tcg_handle_semihosting Date: Fri, 4 Jun 2021 16:52:25 +0100 Message-Id: <20210604155312.15902-53-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210604155312.15902-1-alex.bennee@linaro.org> References: <20210604155312.15902-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Claudio Fontana Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Claudio Fontana make it clearer from the name that this is a tcg-only function. Signed-off-by: Claudio Fontana Signed-off-by: Alex Bennée --- target/arm/tcg/tcg-cpu.h | 2 +- target/arm/cpu-sysemu.c | 2 +- target/arm/tcg/sysemu/tcg-cpu.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg/tcg-cpu.h b/target/arm/tcg/tcg-cpu.h index 0ee8ba073b..7e62f92d16 100644 --- a/target/arm/tcg/tcg-cpu.h +++ b/target/arm/tcg/tcg-cpu.h @@ -24,7 +24,7 @@ #ifndef CONFIG_USER_ONLY /* Do semihosting call and set the appropriate return value. */ -void handle_semihosting(CPUState *cs); +void tcg_handle_semihosting(CPUState *cs); #endif /* !CONFIG_USER_ONLY */ diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c index 0e872b2e55..7569241339 100644 --- a/target/arm/cpu-sysemu.c +++ b/target/arm/cpu-sysemu.c @@ -1153,7 +1153,7 @@ void arm_cpu_do_interrupt(CPUState *cs) * must be handled here. */ if (cs->exception_index == EXCP_SEMIHOST) { - handle_semihosting(cs); + tcg_handle_semihosting(cs); return; } #endif /* CONFIG_TCG */ diff --git a/target/arm/tcg/sysemu/tcg-cpu.c b/target/arm/tcg/sysemu/tcg-cpu.c index af9d3905d7..2c395f47e7 100644 --- a/target/arm/tcg/sysemu/tcg-cpu.c +++ b/target/arm/tcg/sysemu/tcg-cpu.c @@ -52,7 +52,7 @@ * We only see semihosting exceptions in TCG only as they are not * trapped to the hypervisor in KVM. */ -void handle_semihosting(CPUState *cs) +void tcg_handle_semihosting(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; -- 2.20.1