From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9126C11F66 for ; Wed, 30 Jun 2021 23:00:52 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D0CC613EA for ; Wed, 30 Jun 2021 23:00:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6D0CC613EA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=P+k8bVvY79Edrw9IclZ52ePJc9y9Tn9lazH9uEqF1vE=; b=mv/oi7przCQifp 2035DEKKoknMNqDrbKIne35ZxCjRUHnDcRmbRq/C6ei1/XKbjt9XSqu36kVPfzjegfOjgoTdBXlo6 vNsIR61rbvTzA0XIt+rb2yEJC9VWy/KEeEuqorykpU1PUjKUmQmOhKiMqhz/zPQZOUN3hWQAgLOWl LlLUovsbMyd+rKq6DLqXRtZfWpeVIobziJd5CQ17t6Hjxq0doAU/hW5FzRFrUKXN9dDh5+sclcm4N iA0xG7yQ0l8WgpR5KPisxUnfemZKn32F2zM/F3CfDymw+7i65TdK8ui4aOx2UniVPX117QLfIdTZO 9TJjGYB3nfAH7uQk1BJQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1lyjAr-00FSnU-RH; Wed, 30 Jun 2021 22:59:17 +0000 Received: from phobos.denx.de ([2a01:238:438b:c500:173d:9f52:ddab:ee01]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1lyjAo-00FSmw-5M for linux-arm-kernel@lists.infradead.org; Wed, 30 Jun 2021 22:59:15 +0000 Received: from tr.lan (ip-89-176-112-137.net.upcbroadband.cz [89.176.112.137]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 532808317B; Thu, 1 Jul 2021 00:59:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1625093952; bh=okyoYmNkvFfex5p5Rv13n0bLsikqeM4wlt5xlXtfZF0=; h=From:To:Cc:Subject:Date:From; b=a8YQrrVSJ8m1brgSs4kU1p2XZRpquUtAe15nzj0AUcSaQKHFMMyehLSyLVvTYrqGV J7CwajwkcrG59rFOUGkl+uyi89USKZzA9vjBft/EoZL32XT44N+JB2MZFcdGKbdqfF pZ7s164/FRuYWBU50wqfUK3xtxK6YhmAx+z600JgF1MQU/191405gK/35qJEEbyxWI ywNiupvWD+TSNw9yUZyBow8wK/6H5M6rhemfKrh5aC/4lwdHlm3Qj5ej8S+Akqxob0 poehmUdeUcHuq+G4EaxhYZBdYQtCIlvOQUMZg4NMuFYTX6mCB3x4PMd/vgsoUSETuC 3ZWqaAyz8RoSQ== From: Marek Vasut To: linux-arm-kernel@lists.infradead.org Cc: ch@denx.de, Marek Vasut , Fabio Estevam , Frieder Schrempf , NXP Linux Team , Peng Fan , Shawn Guo Subject: [PATCH] soc: imx: gpcv2: Assert reset before ungating clock Date: Thu, 1 Jul 2021 00:59:02 +0200 Message-Id: <20210630225902.237192-1-marex@denx.de> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210630_155914_560494_93F75D4D X-CRM114-Status: GOOD ( 14.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In case the power domain clock are ungated before the reset is asserted, the system might freeze completely. However, the MX8MM GPUMIX and VPUMIX domains require different reset deassertion timing, and incorrect reset deassertion timing also leads to hang. Add per-domain reset_{,de}assert_early flags which allow fine-grained control of the reset assertion and deassertion sequence. Currently, on MX8MM, the behavior is as follows and aligned with NXP downstream ATF fork: - VPUMIX: reset assert, reset deassert, domain power up - GPUMIX: reset assert, domain power on, reset deassert Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Frieder Schrempf Cc: NXP Linux Team Cc: Peng Fan Cc: Shawn Guo To: linux-arm-kernel@lists.infradead.org --- drivers/soc/imx/gpcv2.c | 41 +++++++++++++++++++++++++++++++++-------- 1 file changed, 33 insertions(+), 8 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 34a9ac1f2b9b1..388c4c729c95b 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -201,6 +201,9 @@ struct imx_pgc_domain { u32 hskack; } bits; + bool reset_assert_early; + bool reset_deassert_early; + const int voltage; struct device *dev; }; @@ -237,6 +240,17 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) } } + /* delays for reset to propagate */ + if (domain->reset_assert_early) { + reset_control_assert(domain->reset); + udelay(5); + } + + if (domain->reset_deassert_early) { + reset_control_deassert(domain->reset); + udelay(5); + } + /* Enable reset clocks for all devices in the domain */ ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); if (ret) { @@ -245,6 +259,10 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) } if (domain->bits.pxx) { + /* disable power control */ + regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), + GPC_PGC_CTRL_PCR); + /* request the domain to power up */ regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, domain->bits.pxx, domain->bits.pxx); @@ -260,18 +278,19 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) dev_err(domain->dev, "failed to command PGC\n"); goto out_clk_disable; } - - /* disable power control */ - regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc), - GPC_PGC_CTRL_PCR); } - reset_control_assert(domain->reset); - /* delay for reset to propagate */ - udelay(5); + /* delays for reset to propagate */ + if (!domain->reset_assert_early) { + reset_control_assert(domain->reset); + udelay(5); + } - reset_control_deassert(domain->reset); + if (!domain->reset_deassert_early) { + reset_control_deassert(domain->reset); + udelay(5); + } /* request the ADB400 to power up */ if (domain->bits.hskreq) { @@ -676,6 +695,9 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_GPU_HSK_PWRDNACKN, }, .pgc = IMX8MM_PGC_GPU2D, + /* Assert reset, power up domain, deassert reset */ + .reset_assert_early = true, + .reset_deassert_early = false, }, [IMX8MM_POWER_DOMAIN_VPUMIX] = { @@ -689,6 +711,9 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN, }, .pgc = IMX8MM_PGC_VPUMIX, + /* Assert reset, deassert reset, power up domain */ + .reset_assert_early = true, + .reset_deassert_early = true, }, [IMX8MM_POWER_DOMAIN_VPUG1] = { -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel