From: David Edmondson <david.edmondson@oracle.com> To: qemu-devel@nongnu.org Cc: Richard Henderson <richard.henderson@linaro.org>, Michael Roth <michael.roth@amd.com>, kvm@vger.kernel.org, Roman Bolshakov <r.bolshakov@yadro.com>, Paolo Bonzini <pbonzini@redhat.com>, Marcelo Tosatti <mtosatti@redhat.com>, babu.moger@amd.com, Cameron Esfahani <dirty@apple.com>, Eduardo Habkost <ehabkost@redhat.com>, David Edmondson <david.edmondson@oracle.com> Subject: [RFC PATCH 5/8] target/i386: Make x86_ext_save_areas visible outside cpu.c Date: Mon, 5 Jul 2021 11:46:29 +0100 [thread overview] Message-ID: <20210705104632.2902400-6-david.edmondson@oracle.com> (raw) In-Reply-To: <20210705104632.2902400-1-david.edmondson@oracle.com> Provide visibility of the x86_ext_save_areas array and associated type outside of cpu.c. Signed-off-by: David Edmondson <david.edmondson@oracle.com> --- target/i386/cpu.c | 7 +------ target/i386/cpu.h | 9 +++++++++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d8f3ab3192..13caa0de50 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1304,12 +1304,7 @@ static const X86RegisterInfo32 x86_reg_info_32[CPU_NB_REGS32] = { }; #undef REGISTER -typedef struct ExtSaveArea { - uint32_t feature, bits; - uint32_t offset, size; -} ExtSaveArea; - -static const ExtSaveArea x86_ext_save_areas[] = { +const ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT] = { [XSTATE_FP_BIT] = { /* x87 FP state component is always enabled if XSAVE is supported */ .feature = FEAT_1_ECX, .bits = CPUID_EXT_XSAVE, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index ada2941c6e..c9c0a34330 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1370,6 +1370,15 @@ QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, zmm_hi256_state) != XSAVE_ZMM_HI256_OFF QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, hi16_zmm_state) != XSAVE_HI16_ZMM_OFFSET); QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, pkru_state) != XSAVE_PKRU_OFFSET); +typedef struct ExtSaveArea { + uint32_t feature, bits; + uint32_t offset, size; +} ExtSaveArea; + +#define XSAVE_STATE_AREA_COUNT (XSTATE_PKRU_BIT + 1) + +extern const ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT]; + typedef enum TPRAccess { TPR_ACCESS_READ, TPR_ACCESS_WRITE, -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: David Edmondson <david.edmondson@oracle.com> To: qemu-devel@nongnu.org Cc: Eduardo Habkost <ehabkost@redhat.com>, kvm@vger.kernel.org, Michael Roth <michael.roth@amd.com>, Marcelo Tosatti <mtosatti@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Cameron Esfahani <dirty@apple.com>, David Edmondson <david.edmondson@oracle.com>, babu.moger@amd.com, Roman Bolshakov <r.bolshakov@yadro.com>, Paolo Bonzini <pbonzini@redhat.com> Subject: [RFC PATCH 5/8] target/i386: Make x86_ext_save_areas visible outside cpu.c Date: Mon, 5 Jul 2021 11:46:29 +0100 [thread overview] Message-ID: <20210705104632.2902400-6-david.edmondson@oracle.com> (raw) In-Reply-To: <20210705104632.2902400-1-david.edmondson@oracle.com> Provide visibility of the x86_ext_save_areas array and associated type outside of cpu.c. Signed-off-by: David Edmondson <david.edmondson@oracle.com> --- target/i386/cpu.c | 7 +------ target/i386/cpu.h | 9 +++++++++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d8f3ab3192..13caa0de50 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1304,12 +1304,7 @@ static const X86RegisterInfo32 x86_reg_info_32[CPU_NB_REGS32] = { }; #undef REGISTER -typedef struct ExtSaveArea { - uint32_t feature, bits; - uint32_t offset, size; -} ExtSaveArea; - -static const ExtSaveArea x86_ext_save_areas[] = { +const ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT] = { [XSTATE_FP_BIT] = { /* x87 FP state component is always enabled if XSAVE is supported */ .feature = FEAT_1_ECX, .bits = CPUID_EXT_XSAVE, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index ada2941c6e..c9c0a34330 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1370,6 +1370,15 @@ QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, zmm_hi256_state) != XSAVE_ZMM_HI256_OFF QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, hi16_zmm_state) != XSAVE_HI16_ZMM_OFFSET); QEMU_BUILD_BUG_ON(offsetof(X86XSaveArea, pkru_state) != XSAVE_PKRU_OFFSET); +typedef struct ExtSaveArea { + uint32_t feature, bits; + uint32_t offset, size; +} ExtSaveArea; + +#define XSAVE_STATE_AREA_COUNT (XSTATE_PKRU_BIT + 1) + +extern const ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT]; + typedef enum TPRAccess { TPR_ACCESS_READ, TPR_ACCESS_WRITE, -- 2.30.2
next prev parent reply other threads:[~2021-07-05 10:46 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-05 10:46 [RFC PATCH 0/8] Derive XSAVE state component offsets from CPUID leaf 0xd where possible David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 1/8] target/i386: Declare constants for XSAVE offsets David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 2/8] target/i386: Consolidate the X86XSaveArea offset checks David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 3/8] target/i386: Clarify the padding requirements of X86XSaveArea David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 4/8] target/i386: Pass buffer and length to XSAVE helper David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` David Edmondson [this message] 2021-07-05 10:46 ` [RFC PATCH 5/8] target/i386: Make x86_ext_save_areas visible outside cpu.c David Edmondson 2021-07-05 10:46 ` [RFC PATCH 6/8] target/i386: Observe XSAVE state area offsets David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 7/8] target/i386: Populate x86_ext_save_areas offsets using cpuid where possible David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-05 10:46 ` [RFC PATCH 8/8] target/i386: Move X86XSaveArea into TCG David Edmondson 2021-07-05 10:46 ` David Edmondson 2021-07-07 1:09 ` Richard Henderson 2021-07-07 1:09 ` Richard Henderson 2021-07-07 6:51 ` Paolo Bonzini 2021-07-07 10:10 ` David Edmondson 2021-07-07 10:10 ` David Edmondson 2021-07-08 7:45 ` David Edmondson 2021-07-08 15:22 ` Richard Henderson 2021-07-08 16:13 ` David Edmondson 2021-07-05 16:57 ` [RFC PATCH 0/8] Derive XSAVE state component offsets from CPUID leaf 0xd where possible Paolo Bonzini 2021-07-05 16:57 ` Paolo Bonzini
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