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From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
To: <u-boot@lists.denx.de>
Cc: <peng.fan@nxp.com>, <jh80.chung@samsung.com>, <git@xilinx.com>,
	<monstr@monstr.eu>, <somaashokreddy@gmail.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Subject: [PATCH 6/6] mmc: zynq_sdhci: Make variables/structure static
Date: Fri, 9 Jul 2021 01:17:16 -0600	[thread overview]
Message-ID: <20210709071716.17093-7-ashok.reddy.soma@xilinx.com> (raw)
In-Reply-To: <20210709071716.17093-1-ashok.reddy.soma@xilinx.com>

From: Michal Simek <michal.simek@xilinx.com>

All these variables/structure are local and should be static.

Issues are reported by sparse:
drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static?
drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
---

 drivers/mmc/zynq_sdhci.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 1e6efb1cd4..85a436b242 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -50,12 +50,16 @@ struct arasan_sdhci_priv {
 
 #if defined(CONFIG_ARCH_ZYNQMP) || defined(CONFIG_ARCH_VERSAL)
 /* Default settings for ZynqMP Clock Phases */
-const u32 zynqmp_iclk_phases[] = {0, 63, 63, 0, 63,  0,   0, 183, 54,  0, 0};
-const u32 zynqmp_oclk_phases[] = {0, 72, 60, 0, 60, 72, 135, 48, 72, 135, 0};
+static const u32 zynqmp_iclk_phases[] = {0, 63, 63, 0, 63,  0,
+					 0, 183, 54,  0, 0};
+static const u32 zynqmp_oclk_phases[] = {0, 72, 60, 0, 60, 72,
+					 135, 48, 72, 135, 0};
 
 /* Default settings for Versal Clock Phases */
-const u32 versal_iclk_phases[] = {0, 132, 132, 0, 132, 0, 0, 162, 90, 0, 0};
-const u32 versal_oclk_phases[] = {0,  60, 48, 0, 48, 72, 90, 36, 60, 90, 0};
+static const u32 versal_iclk_phases[] = {0, 132, 132, 0, 132,
+					 0, 0, 162, 90, 0, 0};
+static const u32 versal_oclk_phases[] = {0,  60, 48, 0, 48, 72,
+					 90, 36, 60, 90, 0};
 
 static const u8 mode2timing[] = {
 	[MMC_LEGACY] = MMC_TIMING_LEGACY,
@@ -541,8 +545,8 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host)
 		sdhci_set_uhs_timing(host);
 }
 
-const struct sdhci_ops arasan_ops = {
-	.platform_execute_tuning = &arasan_sdhci_execute_tuning,
+static const struct sdhci_ops arasan_ops = {
+	.platform_execute_tuning	= &arasan_sdhci_execute_tuning,
 	.set_delay = &arasan_sdhci_set_tapdelay,
 	.set_control_reg = &arasan_sdhci_set_control_reg,
 };
-- 
2.17.1


      parent reply	other threads:[~2021-07-09  7:18 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-09  7:17 [PATCH 0/6] This patch set fixes minor issues related to tapdelays Ashok Reddy Soma
2021-07-09  7:17 ` [PATCH 1/6] mmc: zynq_sdhci: Resolve uninitialized return value Ashok Reddy Soma
2021-07-09  9:37   ` Jaehoon Chung
2021-07-09 10:15     ` Ashok Reddy Soma
2021-07-09 10:50       ` Jaehoon Chung
2021-07-09 10:57         ` Ashok Reddy Soma
2021-07-09  7:17 ` [PATCH 2/6] mmc: zynq_sdhci: Allow configuring zero Tap values Ashok Reddy Soma
2021-07-09  7:17 ` [PATCH 3/6] mmc: zynq_sdhci: Use Mask writes for Tap delays Ashok Reddy Soma
2021-07-09  7:17 ` [PATCH 4/6] mmc: zynq_sdhci: Split set_tapdelay function to in and out Ashok Reddy Soma
2021-07-09  7:17 ` [PATCH 5/6] mmc: zynq_sdhci: Fix kernel doc warnings Ashok Reddy Soma
2021-07-09  9:42   ` Jaehoon Chung
2021-07-09 10:18     ` Ashok Reddy Soma
2021-07-09  7:17 ` Ashok Reddy Soma [this message]

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