From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E1ACC63799 for ; Thu, 22 Jul 2021 17:53:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A67D61380 for ; Thu, 22 Jul 2021 17:53:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230109AbhGVRMf (ORCPT ); Thu, 22 Jul 2021 13:12:35 -0400 Received: from foss.arm.com ([217.140.110.172]:57966 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230074AbhGVRMa (ORCPT ); Thu, 22 Jul 2021 13:12:30 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B2C2411B3; Thu, 22 Jul 2021 10:53:04 -0700 (PDT) Received: from e113632-lin.cambridge.arm.com (e113632-lin.cambridge.arm.com [10.1.194.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9C0CD3F73D; Thu, 22 Jul 2021 10:53:02 -0700 (PDT) From: Valentin Schneider To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rt-users@vger.kernel.org, x86@kernel.org Cc: Catalin Marinas , Will Deacon , Thomas Gleixner , Steven Rostedt , Daniel Bristot de Oliveira , "Peter Zijlstra (Intel)" , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Mark Brown , Dave Martin , Ard Biesheuvel Subject: [PATCH 1/3] sched/preempt: Introduce preempt_{enable, disable}_bh() Date: Thu, 22 Jul 2021 18:51:55 +0100 Message-Id: <20210722175157.1367122-2-valentin.schneider@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210722175157.1367122-1-valentin.schneider@arm.com> References: <20210722175157.1367122-1-valentin.schneider@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As pointed out by commit: cba08c5dc6dc ("x86/fpu: Make kernel FPU protection RT friendly") local_bh_disable() is not sufficient under CONFIG_PREEMPT_RT for FPU manipulation. This also affects at least arm64, so package the preemption / softirq enablement handling into a pair of helpers. Signed-off-by: Valentin Schneider --- include/linux/bottom_half.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h index eed86eb0a1de..dd98d8c1eb0a 100644 --- a/include/linux/bottom_half.h +++ b/include/linux/bottom_half.h @@ -19,6 +19,24 @@ static inline void local_bh_disable(void) __local_bh_disable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } +/* + * local_bh_disable() protects against both preemption and soft interrupts + * on !RT kernels. + * + * On RT kernels local_bh_disable() is not sufficient because it only + * serializes soft interrupt related sections via a local lock, but stays + * preemptible. Disabling preemption is the right choice here as bottom + * half processing is always in thread context on RT kernels so it + * implicitly prevents bottom half processing as well. + */ +static inline void preempt_disable_bh(void) +{ + if (IS_ENABLED(CONFIG_PREEMPT_RT)) + preempt_disable(); + else + local_bh_disable(); +} + extern void _local_bh_enable(void); extern void __local_bh_enable_ip(unsigned long ip, unsigned int cnt); @@ -32,6 +50,14 @@ static inline void local_bh_enable(void) __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } +static inline void preempt_enable_bh(void) +{ + if (IS_ENABLED(CONFIG_PREEMPT_RT)) + preempt_enable(); + else + local_bh_enable(); +} + #ifdef CONFIG_PREEMPT_RT extern bool local_bh_blocked(void); #else -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3ACE2C6377D for ; Thu, 22 Jul 2021 17:55:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0ECEA61409 for ; Thu, 22 Jul 2021 17:55:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0ECEA61409 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=d5fDfX8kP/Gw6szBh6hpCpGOCpwsoF6rijBOwtudDiQ=; b=Knu2gv/RcPO5Rz O4Et1jrWqbp2C3tfBPKkLjlzcl6Ix1qSh9cBaJKMIgbElohzxMwRIB06jMlside3aiQvob+GnSg8q c5zH1NtoKpOnV4HLABEq/OUZzazEVK2KJwB85/r8d/pJhewZHdeS79U3z1g+y3yYlELNaG9JA82Kd p/0+uCZTafEMuwNopXcvR3hRqoYBmNjBnot3NKG4ZKf/V1hzG0yTml+AheCZsuoTnm0Q4jVsJqEM7 6VbrKCGIlHrePGbMFzJLvqu4arhee0z0N5a4Qk5RUZg4xwnZm2u3U96oEHsKbPNEtStD7fT/fqEwN 193Kze4x4n9yiOVb2IgQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m6ct3-002LXQ-7x; Thu, 22 Jul 2021 17:53:33 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1m6csf-002LS7-Vn for linux-arm-kernel@lists.infradead.org; Thu, 22 Jul 2021 17:53:11 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B2C2411B3; Thu, 22 Jul 2021 10:53:04 -0700 (PDT) Received: from e113632-lin.cambridge.arm.com (e113632-lin.cambridge.arm.com [10.1.194.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9C0CD3F73D; Thu, 22 Jul 2021 10:53:02 -0700 (PDT) From: Valentin Schneider To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rt-users@vger.kernel.org, x86@kernel.org Cc: Catalin Marinas , Will Deacon , Thomas Gleixner , Steven Rostedt , Daniel Bristot de Oliveira , "Peter Zijlstra (Intel)" , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Mark Brown , Dave Martin , Ard Biesheuvel Subject: [PATCH 1/3] sched/preempt: Introduce preempt_{enable, disable}_bh() Date: Thu, 22 Jul 2021 18:51:55 +0100 Message-Id: <20210722175157.1367122-2-valentin.schneider@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210722175157.1367122-1-valentin.schneider@arm.com> References: <20210722175157.1367122-1-valentin.schneider@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210722_105310_095189_8585AB03 X-CRM114-Status: GOOD ( 11.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org As pointed out by commit: cba08c5dc6dc ("x86/fpu: Make kernel FPU protection RT friendly") local_bh_disable() is not sufficient under CONFIG_PREEMPT_RT for FPU manipulation. This also affects at least arm64, so package the preemption / softirq enablement handling into a pair of helpers. Signed-off-by: Valentin Schneider --- include/linux/bottom_half.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/bottom_half.h b/include/linux/bottom_half.h index eed86eb0a1de..dd98d8c1eb0a 100644 --- a/include/linux/bottom_half.h +++ b/include/linux/bottom_half.h @@ -19,6 +19,24 @@ static inline void local_bh_disable(void) __local_bh_disable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } +/* + * local_bh_disable() protects against both preemption and soft interrupts + * on !RT kernels. + * + * On RT kernels local_bh_disable() is not sufficient because it only + * serializes soft interrupt related sections via a local lock, but stays + * preemptible. Disabling preemption is the right choice here as bottom + * half processing is always in thread context on RT kernels so it + * implicitly prevents bottom half processing as well. + */ +static inline void preempt_disable_bh(void) +{ + if (IS_ENABLED(CONFIG_PREEMPT_RT)) + preempt_disable(); + else + local_bh_disable(); +} + extern void _local_bh_enable(void); extern void __local_bh_enable_ip(unsigned long ip, unsigned int cnt); @@ -32,6 +50,14 @@ static inline void local_bh_enable(void) __local_bh_enable_ip(_THIS_IP_, SOFTIRQ_DISABLE_OFFSET); } +static inline void preempt_enable_bh(void) +{ + if (IS_ENABLED(CONFIG_PREEMPT_RT)) + preempt_enable(); + else + local_bh_enable(); +} + #ifdef CONFIG_PREEMPT_RT extern bool local_bh_blocked(void); #else -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel