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From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>,
	Chris Packham <judge.packham@gmail.com>,
	Baruch Siach <baruch@tkos.co.il>,
	Dirk Eibach <dirk.eibach@gdsys.cc>,
	u-boot@lists.denx.de
Cc: "Marek Behún" <marek.behun@nic.cz>,
	"Dennis Gilmore" <dgilmore@redhat.com>,
	"Mario Six" <mario.six@gdsys.cc>,
	"Jon Nettleton" <jon@solid-run.com>
Subject: [PATCH 2/5] arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register
Date: Sat, 31 Jul 2021 14:22:53 +0200	[thread overview]
Message-ID: <20210731122256.6546-3-pali@kernel.org> (raw)
In-Reply-To: <20210731122256.6546-1-pali@kernel.org>

Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
Use this information instead of manual configuration in every board file.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 arch/arm/mach-mvebu/include/mach/soc.h | 3 +++
 include/configs/db-88f6720.h           | 1 -
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index cb323aa59a76..eb6906ad8027 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -145,6 +145,9 @@
 
 #define BOOT_FROM_UART		0x30
 #define BOOT_FROM_SPI		0x38
+
+#define CONFIG_SYS_TCLK		((readl(CONFIG_SAR_REG) & BIT(20)) ? \
+				 200000000 : 166000000)
 #elif defined(CONFIG_ARMADA_38X)
 /* SAR values for Armada 38x */
 #define CONFIG_SAR_REG		(MVEBU_REGISTER(0x18600))
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index cbb9270f9327..67d8cd42d1c2 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -15,7 +15,6 @@
  * for DDR ECC byte filling in the SPL before loading the main
  * U-Boot into it.
  */
-#define CONFIG_SYS_TCLK		200000000	/* 200MHz */
 
 /* I2C */
 #define CONFIG_SYS_I2C
-- 
2.20.1


  parent reply	other threads:[~2021-07-31 12:23 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
2021-07-31 12:22 ` [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Pali Rohár
2021-08-02  6:33   ` Stefan Roese
2021-07-31 12:22 ` Pali Rohár [this message]
2021-08-02  6:33   ` [PATCH 2/5] arm: mvebu: a37x: " Stefan Roese
2021-07-31 12:22 ` [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally Pali Rohár
2021-08-02  6:34   ` Stefan Roese
2021-07-31 12:22 ` [PATCH 4/5] arm: mvebu: axp: " Pali Rohár
2021-08-02  6:35   ` Stefan Roese
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
2021-08-01  8:07   ` Chris Packham
2021-08-01 10:25     ` Pali Rohár
2022-08-16  9:37       ` Michael Walle
2022-08-16 18:17         ` Pali Rohár
2022-08-16 19:38           ` Pali Rohár
2022-08-16 20:02             ` Pali Rohár
2022-08-16 20:06             ` Michael Walle
2022-08-16 20:05           ` Michael Walle
2021-08-02  6:35   ` Stefan Roese
2021-08-11  8:27 ` [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Stefan Roese

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