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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: gwan-gyeong.mun@intel.com, mika.kahola@intel.com,
	jani.nikula@intel.com, manasi.d.navare@intel.com,
	Animesh Manna <animesh.manna@intel.com>
Subject: [Intel-gfx] [RFC 5/5] drm/i915/panelreplay: Added state checker for panel replay state
Date: Wed,  8 Sep 2021 14:45:44 +0530	[thread overview]
Message-ID: <20210908091544.13772-6-animesh.manna@intel.com> (raw)
In-Reply-To: <20210908091544.13772-1-animesh.manna@intel.com>

has_panel_replay flag is used to check panel replay state
which is part of crtc_state structure.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 1 +
 drivers/gpu/drm/i915/display/intel_psr.c     | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 134c792e1dbd..0dcfee8b459d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8090,6 +8090,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 		PIPE_CONF_CHECK_BOOL(has_psr);
 		PIPE_CONF_CHECK_BOOL(has_psr2);
 		PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
+		PIPE_CONF_CHECK_BOOL(has_panel_replay);
 		PIPE_CONF_CHECK_I(dc3co_exitline);
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1dc6b340d745..b5eb78e9397e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1058,6 +1058,7 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 	 */
 	pipe_config->has_psr = true;
 	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
+	pipe_config->has_panel_replay = intel_dp->psr.pr_enabled;
 	pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
 
 	if (!intel_dp->psr.psr2_enabled)
-- 
2.29.0


  parent reply	other threads:[~2021-09-08  9:38 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-08  9:15 [Intel-gfx] [RFC 0/5] Panel replay phase1 implementation Animesh Manna
2021-09-08  9:15 ` [Intel-gfx] [RFC 1/5] drm/i915/panelreplay: update plane selective fetch register definition Animesh Manna
2021-09-08 19:26   ` Souza, Jose
2021-09-08 19:39     ` Manna, Animesh
2021-09-08  9:15 ` [Intel-gfx] [RFC 2/5] drm/i915/panelreplay: Feature flag added for panel replay Animesh Manna
2021-09-08 19:29   ` Souza, Jose
2021-09-08  9:15 ` [Intel-gfx] [RFC 3/5] drm/i915/panelreplay: Initializaton and compute config " Animesh Manna
2021-09-08 12:52   ` kernel test robot
2021-09-08 12:52     ` kernel test robot
2021-09-08 14:07   ` kernel test robot
2021-09-08 14:07     ` kernel test robot
2021-09-08 19:31   ` Souza, Jose
2021-09-08 19:50     ` Manna, Animesh
2021-09-08 19:55       ` Souza, Jose
2021-09-08  9:15 ` [Intel-gfx] [RFC 4/5] drm/i915/panelreplay: enable/disable " Animesh Manna
2021-09-08 19:41   ` Souza, Jose
2021-09-08  9:15 ` Animesh Manna [this message]
2021-09-08 10:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Panel replay phase1 implementation Patchwork
2021-09-08 10:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-08 11:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-08 14:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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