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From: Lukas Wunner <lukas@wunner.de>
To: "LH.Kuo" <lhjeff911@gmail.com>
Cc: p.zabel@pengutronix.de, broonie@kernel.org, robh+dt@kernel.org,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dvorkin@tibbo.com,
	qinjian@cqplus1.com, wells.lu@sunplus.com,
	"LH.Kuo" <lh.kuo@sunplus.com>
Subject: Re: [PATCH v3 1/2] SPI: Add SPI driver for Sunplus SP7021
Date: Tue, 23 Nov 2021 13:48:27 +0100	[thread overview]
Message-ID: <20211123124827.GA22253@wunner.de> (raw)
In-Reply-To: <e5f2549224cf875d81306ef5f6e98db1cfd81c2e.1637547799.git.lh.kuo@sunplus.com>

On Mon, Nov 22, 2021 at 10:33:32AM +0800, LH.Kuo wrote:
> +static int sp7021_spi_controller_probe(struct platform_device *pdev)
> +{
[...]
> +	ret = devm_spi_register_controller(&pdev->dev, ctlr);
> +	if (ret != 0) {
> +		dev_err(&pdev->dev, "spi_register_master fail\n");
> +		goto disable_runtime_pm;
> +	}

You need to use spi_register_controller() here (*not* the devm_ variant)
because you're using spi_unregister_controller() in
sp7021_spi_controller_remove().

> +
> +	// clk
> +	pspim->spi_clk = devm_clk_get(&pdev->dev, NULL);
> +	if (IS_ERR(pspim->spi_clk)) {
> +		return dev_err_probe(&pdev->dev, PTR_ERR(pspim->spi_clk),
> +				     "devm_clk_get fail\n");
> +	}
> +
> +	// reset
> +	pspim->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
> +	dev_dbg(&pdev->dev, "pspim->rstc : 0x%x\n", (unsigned int)pspim->rstc);
> +	if (IS_ERR(pspim->rstc)) {
> +		return dev_err_probe(&pdev->dev, PTR_ERR(pspim->rstc),
> +				     "devm_rst_get fail\n");
> +	}
> +
> +	ret = clk_prepare_enable(pspim->spi_clk);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret,
> +			"failed to enable clk\n");
> +
> +	ret = reset_control_deassert(pspim->rstc);
> +	if (ret) {
> +		dev_err_probe(&pdev->dev, ret,
> +			"failed to deassert reset\n");
> +		goto free_reset_assert;
> +
> +	}

You need to move the above steps *before* the call to
spi_register_controller().  Once spi_register_controller() returns,
it must be able to perform SPI transactions.  So you have to enable
all required clocks before calling it.  You also have to perform the
reset step before registration to avoid interfering with an ongoing
transaction.  The order of these steps must mirror the order in
sp7021_spi_controller_remove():  There you're unregistering the
controller *before* disabling the clock and asserting reset,
so the order must be inverted here.


> +static int sp7021_spi_controller_remove(struct platform_device *pdev)
> +{
> +	struct spi_controller *ctlr = dev_get_drvdata(&pdev->dev);
> +	struct sp7021_spi_ctlr *pspim = spi_master_get_devdata(ctlr);
> +
> +	pm_runtime_disable(&pdev->dev);
> +	pm_runtime_set_suspended(&pdev->dev);
> +
> +	spi_unregister_controller(pspim->ctlr);
> +	clk_disable_unprepare(pspim->spi_clk);
> +	reset_control_assert(pspim->rstc);
> +
> +	return 0;
> +}

I think the two calls to pm_runtime_* should be moved after
spi_unregister_controller() but that's probably not critical.

Thanks,

Lukas

  parent reply	other threads:[~2021-11-23 12:48 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-01  6:18 [PATCH 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-01  6:18 ` [PATCH 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-01 18:36   ` Mark Brown
     [not found]     ` <1c5b8e435d614772a5c0af8d5c633941@sphcmbx02.sunplus.com.tw>
2021-11-05 13:29       ` Mark Brown
2021-11-10 16:46     ` Andy Shevchenko
2021-11-02 14:31   ` Philipp Zabel
2021-11-14  8:02   ` Lukas Wunner
2021-11-01  6:18 ` [PATCH 2/2] devicetree bindings SPI Add bindings doc " LH.Kuo
2021-11-09  9:01 ` [PATCH v2 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-09  9:01   ` [PATCH v2 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-09 14:56     ` Mark Brown
     [not found]       ` <f98b5548cf564093af1d10ba1239507d@sphcmbx02.sunplus.com.tw>
2021-11-10 16:22         ` Mark Brown
     [not found]           ` <70a9c10ef34e46c2a51f134829abdd08@sphcmbx02.sunplus.com.tw>
2021-11-11 13:41             ` Mark Brown
     [not found]               ` <083dc70e20964ec8b74f71f6817be55e@sphcmbx02.sunplus.com.tw>
2021-11-18 13:38                 ` Mark Brown
     [not found]                   ` <e98c0bc4dc99415099197688a8dd3ef5@sphcmbx02.sunplus.com.tw>
2021-11-19 13:06                     ` Mark Brown
2021-11-09 16:55     ` Randy Dunlap
     [not found]       ` <de7535b134fb4247b5275c04fa21debf@sphcmbx02.sunplus.com.tw>
2021-11-10  5:41         ` Randy Dunlap
2021-11-09  9:01   ` [PATCH v2 2/2] devicetree bindings SPI Add bindings doc " LH.Kuo
2021-11-09 14:57     ` Mark Brown
     [not found]       ` <2eeae9b780e94ac9810ffffe249098f2@sphcmbx02.sunplus.com.tw>
2021-11-10 14:11         ` Mark Brown
2021-11-22  2:33 ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC LH.Kuo
2021-11-22  2:33   ` [PATCH v3 1/2] SPI: Add SPI driver for Sunplus SP7021 LH.Kuo
2021-11-22 22:09     ` Andy Shevchenko
2021-11-23 14:03       ` Mark Brown
2021-11-23 17:11         ` Andy Shevchenko
     [not found]           ` <6eb68a8153ba46c48862d00f7aa6e0fe@sphcmbx02.sunplus.com.tw>
2021-11-25 10:06             ` Andy Shevchenko
     [not found]               ` <33d50e94059b4734939db60b5c531bc9@sphcmbx02.sunplus.com.tw>
2021-11-26 10:33                 ` Andy Shevchenko
2021-11-26 10:36                 ` Philipp Zabel
2021-11-26 13:03                   ` Mark Brown
     [not found]                     ` <d33a3a4f3b8248a78fae572a7f88050a@sphcmbx02.sunplus.com.tw>
2021-11-29 13:10                       ` Andy Shevchenko
     [not found]                         ` <3d792085d6fc4be19253f5200c181041@sphcmbx02.sunplus.com.tw>
2021-12-01 19:28                           ` Andy Shevchenko
2021-11-23 12:48     ` Lukas Wunner [this message]
2021-11-22  2:33   ` [PATCH v3 2/2] devicetree: bindings SPI Add bindings doc " LH.Kuo
2021-11-29  0:35     ` Rob Herring
2021-11-23 14:36   ` [PATCH v3 0/2] Add SPI control driver for Sunplus SP7021 SoC Mark Brown

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