From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, android-kvm@google.com,
Ard Biesheuvel <ardb@kernel.org>, Marc Zyngier <maz@kernel.org>,
Will Deacon <will@kernel.org>
Subject: [RFC PATCH 6/8] arm64: head: clean the ID map page to the PoC
Date: Fri, 4 Mar 2022 18:56:55 +0100 [thread overview]
Message-ID: <20220304175657.2744400-7-ardb@kernel.org> (raw)
In-Reply-To: <20220304175657.2744400-1-ardb@kernel.org>
If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
and invalidate the I-cache so we can safely execute from it after
disabling the MMU and caches.
Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm64/kernel/head.S | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 6041078df62a..ebc04d25f775 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -75,7 +75,7 @@
__EFI_PE_HEADER
- __INIT
+ .section ".idmap.text","awx"
/*
* The following callee saved general purpose registers are used on the
@@ -94,6 +94,19 @@ SYM_CODE_START(primary_entry)
bl record_kaslr_offset
bl preserve_boot_args
bl __create_page_tables
+
+ /*
+ * If we entered with the MMU and caches on, clean the ID mapped part
+ * of the primary boot code to the PoC and invalidate it from the
+ * I-cache so we can safely disable them.
+ */
+ cbz x25, 0f
+ adrp x0, __idmap_text_start
+ adr_l x1, __idmap_text_end
+ sub x1, x1, x0
+ bl dcache_clean_poc
+ ic ialluis
+0:
bl init_kernel_el // w0=cpu_boot_mode
bl set_cpu_boot_mode_flag
/*
@@ -106,6 +119,7 @@ SYM_CODE_START(primary_entry)
b __primary_switch
SYM_CODE_END(primary_entry)
+ __INIT
SYM_CODE_START_LOCAL(record_mmu_state)
mrs x25, CurrentEL
cmp x25, #CurrentEL_EL2
--
2.30.2
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next prev parent reply other threads:[~2022-03-04 18:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 17:56 [RFC PATCH 0/8] arm64: efi: leave MMU and caches on at boot Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 1/8] arm64: kaslr: deal with init called with VA randomization enabled Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 2/8] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 3/8] arm64: head: take KASLR seed passed via x1 into account Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 4/8] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 5/8] arm64: head: populate page tables before disabling the MMU Ard Biesheuvel
2022-03-04 17:56 ` Ard Biesheuvel [this message]
2022-03-04 17:56 ` [RFC PATCH 7/8] arm64: lds: move idmap_pg_dir out of .rodata Ard Biesheuvel
2022-03-04 17:56 ` [RFC PATCH 8/8] arm64: efi: leave MMU and caches on when handing over to the core kernel Ard Biesheuvel
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