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From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <Eugen.Hristev@microchip.com>
Cc: <u-boot@lists.denx.de>, Tudor Ambarus <tudor.ambarus@microchip.com>
Subject: [PATCH] ARM: dts: at91: sama7g5: Fix QSPI1 clock
Date: Fri, 8 Apr 2022 11:41:11 +0300	[thread overview]
Message-ID: <20220408084111.734323-1-tudor.ambarus@microchip.com> (raw)

QSPI1 used the clock of QSPI0, fix it.

Fixes: 5eecc37bb1 ("ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 arch/arm/dts/sama7g5.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index b7c261ebe9..186795da87 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -316,7 +316,7 @@
 			dma-names = "tx", "rx";
 			clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
 			clock-names = "pclk", "gclk";
-			assigned-clocks = <&pmc PMC_TYPE_GCK 78>;
+			assigned-clocks = <&pmc PMC_TYPE_GCK 79>;
 			assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */
 			#address-cells = <1>;
 			#size-cells = <0>;
-- 
2.25.1


             reply	other threads:[~2022-04-08  8:41 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-08  8:41 Tudor Ambarus [this message]
2022-04-27  6:07 ` [PATCH] ARM: dts: at91: sama7g5: Fix QSPI1 clock Eugen.Hristev

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