From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>,
Likun Gao <Likun.Gao@amd.com>,
"Stanley . Yang" <Stanley.Yang@amd.com>,
Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 4/5] drm/amdgpu: add new write field for soc21
Date: Tue, 26 Apr 2022 14:52:54 -0400 [thread overview]
Message-ID: <20220426185255.3039590-3-alexander.deucher@amd.com> (raw)
In-Reply-To: <20220426185255.3039590-1-alexander.deucher@amd.com>
From: Likun Gao <Likun.Gao@amd.com>
add new write field macro to handle soc21
registers with reg prefix
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index acce8c2e0328..9fefd403e14f 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -45,6 +45,14 @@
~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field), \
0, ip##_HWIP)
+#define WREG32_FIELD15_PREREG(ip, idx, reg_name, field, val) \
+ __WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \
+ (__RREG32_SOC15_RLC__( \
+ adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \
+ 0, ip##_HWIP) & \
+ ~REG_FIELD_MASK(reg_name, field)) | (val) << REG_FIELD_SHIFT(reg_name, field), \
+ 0, ip##_HWIP)
+
#define RREG32_SOC15(ip, inst, reg) \
__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \
0, ip##_HWIP)
--
2.35.1
next prev parent reply other threads:[~2022-04-26 18:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-26 18:52 [PATCH 0/5] Add new SoC21 infrastructure Alex Deucher
2022-04-26 18:52 ` [PATCH 3/5] drm/amdgpu: add nbio callback to query rom offset Alex Deucher
2022-04-26 18:52 ` Alex Deucher [this message]
2022-04-26 18:52 ` [PATCH 5/5] drm/amdgpu: add soc21 common ip block v2 Alex Deucher
2022-04-27 5:54 ` [PATCH 0/5] Add new SoC21 infrastructure Christian König
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220426185255.3039590-3-alexander.deucher@amd.com \
--to=alexander.deucher@amd.com \
--cc=Hawking.Zhang@amd.com \
--cc=Likun.Gao@amd.com \
--cc=Stanley.Yang@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.