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From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	patches@lists.linux.dev,
	Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Borislav Petkov <bp@suse.de>,
	Josh Poimboeuf <jpoimboe@kernel.org>,
	Thadeu Lima de Souza Cascardo <cascardo@canonical.com>,
	Suleiman Souhlal <suleiman@google.com>
Subject: [PATCH 4.19 15/34] x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS
Date: Mon, 21 Nov 2022 13:43:37 +0100	[thread overview]
Message-ID: <20221121124151.431721277@linuxfoundation.org> (raw)
In-Reply-To: <20221121124150.886779344@linuxfoundation.org>

From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>

commit 7c693f54c873691a4b7da05c7e0f74e67745d144 upstream.

Extend spectre_v2= boot option with Kernel IBRS.

  [jpoimboe: no STIBP with IBRS]

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Signed-off-by: Suleiman Souhlal <suleiman@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 Documentation/admin-guide/kernel-parameters.txt |    1 
 arch/x86/include/asm/nospec-branch.h            |    1 
 arch/x86/kernel/cpu/bugs.c                      |   66 ++++++++++++++++++------
 3 files changed, 54 insertions(+), 14 deletions(-)

--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -4389,6 +4389,7 @@
 			eibrs		  - enhanced IBRS
 			eibrs,retpoline   - enhanced IBRS + Retpolines
 			eibrs,lfence      - enhanced IBRS + LFENCE
+			ibrs		  - use IBRS to protect kernel
 
 			Not specifying this option is equivalent to
 			spectre_v2=auto.
--- a/arch/x86/include/asm/nospec-branch.h
+++ b/arch/x86/include/asm/nospec-branch.h
@@ -244,6 +244,7 @@ enum spectre_v2_mitigation {
 	SPECTRE_V2_EIBRS,
 	SPECTRE_V2_EIBRS_RETPOLINE,
 	SPECTRE_V2_EIBRS_LFENCE,
+	SPECTRE_V2_IBRS,
 };
 
 /* The indirect branch speculation control variants */
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -877,6 +877,7 @@ enum spectre_v2_mitigation_cmd {
 	SPECTRE_V2_CMD_EIBRS,
 	SPECTRE_V2_CMD_EIBRS_RETPOLINE,
 	SPECTRE_V2_CMD_EIBRS_LFENCE,
+	SPECTRE_V2_CMD_IBRS,
 };
 
 enum spectre_v2_user_cmd {
@@ -949,11 +950,12 @@ spectre_v2_parse_user_cmdline(enum spect
 	return SPECTRE_V2_USER_CMD_AUTO;
 }
 
-static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)
+static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode)
 {
-	return (mode == SPECTRE_V2_EIBRS ||
-		mode == SPECTRE_V2_EIBRS_RETPOLINE ||
-		mode == SPECTRE_V2_EIBRS_LFENCE);
+	return mode == SPECTRE_V2_IBRS ||
+	       mode == SPECTRE_V2_EIBRS ||
+	       mode == SPECTRE_V2_EIBRS_RETPOLINE ||
+	       mode == SPECTRE_V2_EIBRS_LFENCE;
 }
 
 static void __init
@@ -1018,12 +1020,12 @@ spectre_v2_user_select_mitigation(enum s
 	}
 
 	/*
-	 * If no STIBP, enhanced IBRS is enabled or SMT impossible, STIBP is not
-	 * required.
+	 * If no STIBP, IBRS or enhanced IBRS is enabled, or SMT impossible,
+	 * STIBP is not required.
 	 */
 	if (!boot_cpu_has(X86_FEATURE_STIBP) ||
 	    !smt_possible ||
-	    spectre_v2_in_eibrs_mode(spectre_v2_enabled))
+	    spectre_v2_in_ibrs_mode(spectre_v2_enabled))
 		return;
 
 	/*
@@ -1048,6 +1050,7 @@ static const char * const spectre_v2_str
 	[SPECTRE_V2_EIBRS]			= "Mitigation: Enhanced IBRS",
 	[SPECTRE_V2_EIBRS_LFENCE]		= "Mitigation: Enhanced IBRS + LFENCE",
 	[SPECTRE_V2_EIBRS_RETPOLINE]		= "Mitigation: Enhanced IBRS + Retpolines",
+	[SPECTRE_V2_IBRS]			= "Mitigation: IBRS",
 };
 
 static const struct {
@@ -1065,6 +1068,7 @@ static const struct {
 	{ "eibrs,lfence",	SPECTRE_V2_CMD_EIBRS_LFENCE,	  false },
 	{ "eibrs,retpoline",	SPECTRE_V2_CMD_EIBRS_RETPOLINE,	  false },
 	{ "auto",		SPECTRE_V2_CMD_AUTO,		  false },
+	{ "ibrs",		SPECTRE_V2_CMD_IBRS,              false },
 };
 
 static void __init spec_v2_print_cond(const char *reason, bool secure)
@@ -1127,6 +1131,24 @@ static enum spectre_v2_mitigation_cmd __
 		return SPECTRE_V2_CMD_AUTO;
 	}
 
+	if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
+		pr_err("%s selected but not Intel CPU. Switching to AUTO select\n",
+		       mitigation_options[i].option);
+		return SPECTRE_V2_CMD_AUTO;
+	}
+
+	if (cmd == SPECTRE_V2_CMD_IBRS && !boot_cpu_has(X86_FEATURE_IBRS)) {
+		pr_err("%s selected but CPU doesn't have IBRS. Switching to AUTO select\n",
+		       mitigation_options[i].option);
+		return SPECTRE_V2_CMD_AUTO;
+	}
+
+	if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
+		pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
+		       mitigation_options[i].option);
+		return SPECTRE_V2_CMD_AUTO;
+	}
+
 	spec_v2_print_cond(mitigation_options[i].option,
 			   mitigation_options[i].secure);
 	return cmd;
@@ -1166,6 +1188,14 @@ static void __init spectre_v2_select_mit
 			break;
 		}
 
+		if (boot_cpu_has_bug(X86_BUG_RETBLEED) &&
+		    retbleed_cmd != RETBLEED_CMD_OFF &&
+		    boot_cpu_has(X86_FEATURE_IBRS) &&
+		    boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
+			mode = SPECTRE_V2_IBRS;
+			break;
+		}
+
 		mode = spectre_v2_select_retpoline();
 		break;
 
@@ -1182,6 +1212,10 @@ static void __init spectre_v2_select_mit
 		mode = spectre_v2_select_retpoline();
 		break;
 
+	case SPECTRE_V2_CMD_IBRS:
+		mode = SPECTRE_V2_IBRS;
+		break;
+
 	case SPECTRE_V2_CMD_EIBRS:
 		mode = SPECTRE_V2_EIBRS;
 		break;
@@ -1198,7 +1232,7 @@ static void __init spectre_v2_select_mit
 	if (mode == SPECTRE_V2_EIBRS && unprivileged_ebpf_enabled())
 		pr_err(SPECTRE_V2_EIBRS_EBPF_MSG);
 
-	if (spectre_v2_in_eibrs_mode(mode)) {
+	if (spectre_v2_in_ibrs_mode(mode)) {
 		/* Force it so VMEXIT will restore correctly */
 		x86_spec_ctrl_base |= SPEC_CTRL_IBRS;
 		write_spec_ctrl_current(x86_spec_ctrl_base, true);
@@ -1209,6 +1243,10 @@ static void __init spectre_v2_select_mit
 	case SPECTRE_V2_EIBRS:
 		break;
 
+	case SPECTRE_V2_IBRS:
+		setup_force_cpu_cap(X86_FEATURE_KERNEL_IBRS);
+		break;
+
 	case SPECTRE_V2_LFENCE:
 	case SPECTRE_V2_EIBRS_LFENCE:
 		setup_force_cpu_cap(X86_FEATURE_RETPOLINE_LFENCE);
@@ -1235,17 +1273,17 @@ static void __init spectre_v2_select_mit
 	pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");
 
 	/*
-	 * Retpoline means the kernel is safe because it has no indirect
-	 * branches. Enhanced IBRS protects firmware too, so, enable restricted
-	 * speculation around firmware calls only when Enhanced IBRS isn't
-	 * supported.
+	 * Retpoline protects the kernel, but doesn't protect firmware.  IBRS
+	 * and Enhanced IBRS protect firmware too, so enable IBRS around
+	 * firmware calls only when IBRS / Enhanced IBRS aren't otherwise
+	 * enabled.
 	 *
 	 * Use "mode" to check Enhanced IBRS instead of boot_cpu_has(), because
 	 * the user might select retpoline on the kernel command line and if
 	 * the CPU supports Enhanced IBRS, kernel might un-intentionally not
 	 * enable IBRS around firmware calls.
 	 */
-	if (boot_cpu_has(X86_FEATURE_IBRS) && !spectre_v2_in_eibrs_mode(mode)) {
+	if (boot_cpu_has(X86_FEATURE_IBRS) && !spectre_v2_in_ibrs_mode(mode)) {
 		setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW);
 		pr_info("Enabling Restricted Speculation for firmware calls\n");
 	}
@@ -1939,7 +1977,7 @@ static ssize_t mmio_stale_data_show_stat
 
 static char *stibp_state(void)
 {
-	if (spectre_v2_in_eibrs_mode(spectre_v2_enabled))
+	if (spectre_v2_in_ibrs_mode(spectre_v2_enabled))
 		return "";
 
 	switch (spectre_v2_user_stibp) {



  parent reply	other threads:[~2022-11-21 12:44 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-21 12:43 [PATCH 4.19 00/34] 4.19.266-rc1 review Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 01/34] Revert "x86/speculation: Add RSB VM Exit protections" Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 02/34] Revert "x86/cpu: Add a steppings field to struct x86_cpu_id" Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 03/34] x86/cpufeature: Add facility to check for min microcode revisions Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 04/34] x86/cpufeature: Fix various quality problems in the <asm/cpu_device_hd.h> header Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 05/34] x86/devicetable: Move x86 specific macro out of generic code Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 06/34] x86/cpu: Add consistent CPU match macros Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 07/34] x86/cpu: Add a steppings field to struct x86_cpu_id Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 08/34] x86/cpufeatures: Move RETPOLINE flags to word 11 Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 09/34] x86/bugs: Report AMD retbleed vulnerability Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 10/34] x86/bugs: Add AMD retbleed= boot parameter Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 11/34] x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 12/34] x86/entry: Remove skip_r11rcx Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 13/34] x86/entry: Add kernel IBRS implementation Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 14/34] x86/bugs: Optimize SPEC_CTRL MSR writes Greg Kroah-Hartman
2022-11-21 12:43 ` Greg Kroah-Hartman [this message]
2022-11-21 12:43 ` [PATCH 4.19 16/34] x86/bugs: Split spectre_v2_select_mitigation() and spectre_v2_user_select_mitigation() Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 17/34] x86/bugs: Report Intel retbleed vulnerability Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 18/34] intel_idle: Disable IBRS during long idle Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 19/34] x86/speculation: Change FILL_RETURN_BUFFER to work with objtool Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 20/34] x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 21/34] x86/speculation: Fix firmware entry SPEC_CTRL handling Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 22/34] x86/speculation: Fix SPEC_CTRL write on SMT state change Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 23/34] x86/speculation: Use cached host SPEC_CTRL value for guest entry/exit Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 24/34] x86/speculation: Remove x86_spec_ctrl_mask Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 25/34] KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 26/34] KVM: VMX: Fix IBRS handling after vmexit Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 27/34] x86/speculation: Fill RSB on vmexit for IBRS Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 28/34] x86/common: Stamp out the stepping madness Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 29/34] x86/cpu/amd: Enumerate BTC_NO Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 30/34] x86/bugs: Add Cannon lake to RETBleed affected CPU list Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 31/34] x86/speculation: Disable RRSBA behavior Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 32/34] x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 33/34] x86/bugs: Warn when "ibrs" mitigation is selected on Enhanced IBRS parts Greg Kroah-Hartman
2022-11-21 12:43 ` [PATCH 4.19 34/34] x86/speculation: Add RSB VM Exit protections Greg Kroah-Hartman
2022-11-21 18:47 ` [PATCH 4.19 00/34] 4.19.266-rc1 review Shuah Khan
2022-11-21 19:02 ` Pavel Machek
2022-11-22  6:29 ` Naresh Kamboju
2022-11-22 10:16 ` Jon Hunter
2022-11-22 16:58 ` Guenter Roeck
  -- strict thread matches above, loose matches on Subject: below --
2022-11-17  9:19 [PATCH 4.19 00/34] Intel RETBleed mitigations for 4.19 Suleiman Souhlal
2022-11-17  9:19 ` [PATCH 4.19 15/34] x86/speculation: Add spectre_v2=ibrs option to support Kernel IBRS Suleiman Souhlal

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