On Tue, 2022-05-10 at 17:46 -0300, Víctor Colombo wrote: > The bit FI fix used the sfprf flag as a flag for the set_fi parameter > in do_float_check_status where applicable. Now, this patch rename > this > flag to sfifprf to state this dual usage. > > Signed-off-by: Víctor Colombo > > --- > > v2: Add this patch > --- >  target/ppc/fpu_helper.c | 112 ++++++++++++++++++++------------------ > -- >  1 file changed, 56 insertions(+), 56 deletions(-) > > diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c > index 88f9e756a5..7209150d1a 100644 > --- a/target/ppc/fpu_helper.c > +++ b/target/ppc/fpu_helper.c > @@ -1693,9 +1693,9 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, > uint64_t op1, uint64_t op2) >   *   nels  - number of elements (1, 2 or 4) >   *   tp    - type (float32 or float64) >   *   fld   - vsr_t field (VsrD(*) or VsrW(*)) > - *   sfprf - set FPRF > + *   sfifprf - set FI and FPRF >   */ > -#define VSX_ADD_SUB(name, op, nels, tp, fld, sfprf, > r2sp)                    \ > +#define VSX_ADD_SUB(name, op, nels, tp, fld, sfifprf, > r2sp)                  \ >  void helper_##name(CPUPPCState *env, ppc_vsr_t > *xt,                          \ >                     ppc_vsr_t *xa, ppc_vsr_t > *xb)                             \ >  {                                                                    >          \ ...                                                     \ > @@ -2767,9 +2767,9 @@ VSX_CVT_FP_TO_FP_VECTOR(xscvdpqp, 1, float64, > float128, VsrD(0), f128, 1) >   *   ttp   - target type >   *   sfld  - source vsr_t field >   *   tfld  - target vsr_t field > - *   sfprf - set FPRF > + *   sfifprf - set FPRF set FI and FPRF? otherwise, Reviewed-by: Rashmica Gupta