From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Peter Maydell <peter.maydell@linaro.org>, Luc Michel <luc@lmichel.fr>
Cc: QEMU Trivial <qemu-trivial@nongnu.org>,
Michael Tokarev <mjt@tls.msk.ru>,
QEMU Developers <qemu-devel@nongnu.org>,
Andrew Baumann <Andrew.Baumann@microsoft.com>,
Laurent Vivier <laurent@vivier.eu>,
qemu-arm <qemu-arm@nongnu.org>
Subject: Re: [RFC PATCH 2/2] hw/arm/raspi: Restrict BCM2835 / BCM2836 SoC to TCG
Date: Tue, 2 Feb 2021 14:29:06 +0100 [thread overview]
Message-ID: <313440b0-95b8-a690-a7ed-65c8428d7c42@amsat.org> (raw)
In-Reply-To: <CAFEAcA8eDgsGY_Vq5SRuv9HxHY8Qz2j86A0PmKuHfj=H2wm7kQ@mail.gmail.com>
On 2/2/21 1:28 PM, Peter Maydell wrote:
> On Mon, 1 Feb 2021 at 08:18, Luc Michel <luc@lmichel.fr> wrote:
>> On 16:14 Sun 31 Jan , Philippe Mathieu-Daudé wrote:
>>> KVM requires the target cpu to be at least ARMv8 architecture
>>> (support on ARMv7 has been dropped in commit 82bf7ae84ce:
>>> "target/arm: Remove KVM support for 32-bit Arm hosts").
>> Wow, is there absolutely no way to do that then? What about using an
>> ARMv8 and starting in AArch32 mode? Is that possible with KVM? I guess
>> it might not be strictly identical as spawning the "real" CPU...
>
> "Support hardware-accelerated emulation of older v7 CPUs" is
> not a design goal of the virtualization extensions; you can't
> do it. KVM does support having a guest CPU which is AArch32 for EL1,
> but that will never be a v7 CPU, because it will be the same as
> the host CPU, which will always be v8.
>
> In general I would prefer that we don't try to do stuff to
> make KVM kinda-sorta-work on random 32-bit boards by stuffing
> in a not-the-right-type CPU, because this increases our
> security boundary massively.
Fine, as this simplifies many things.
> At the moment we can reasonably
> say "only the 'virt' board and one of the Xilinx boards are
> security-critical".
What about the SBSA-ref?
Thanks,
Phil.
next prev parent reply other threads:[~2021-02-02 13:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-31 15:14 [RFC PATCH 0/2] hw/arm/raspi: Restrict BCM2835 / BCM2836 SoC to TCG Philippe Mathieu-Daudé
2021-01-31 15:14 ` [RFC PATCH 1/2] hw/arm/raspi: Trivial code movement Philippe Mathieu-Daudé
2021-02-01 8:09 ` Luc Michel
2021-01-31 15:14 ` [RFC PATCH 2/2] hw/arm/raspi: Restrict BCM2835 / BCM2836 SoC to TCG Philippe Mathieu-Daudé
2021-02-01 8:18 ` Luc Michel
2021-02-01 8:46 ` Philippe Mathieu-Daudé
2021-02-01 9:04 ` Paolo Bonzini
2021-02-02 12:28 ` Peter Maydell
2021-02-02 13:29 ` Philippe Mathieu-Daudé [this message]
2021-02-02 13:47 ` Peter Maydell
2021-02-02 14:26 ` Philippe Mathieu-Daudé
2021-02-02 12:25 ` [RFC PATCH 0/2] " Peter Maydell
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