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X-Received-From: 216.71.154.42 Subject: [Qemu-riscv] [PATCH v1 02/12] RISC-V: Replace __builtin_popcount with ctpop8 in PLIC X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Mar 2019 01:27:32 -0000 From: Michael Clark The mode variable only uses the lower 4-bits (M,H,S,U) so replace the GCC specific __builtin_popcount with ctpop8. Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Alistair Francis Signed-off-by: Michael Clark Signed-off-by: Alistair Francis --- hw/riscv/sifive_plic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index d12ec3fc9a..b859f919a7 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -383,7 +383,7 @@ static void parse_hart_config(SiFivePLICState *plic) p =3D plic->hart_config; while ((c =3D *p++)) { if (c =3D=3D ',') { - addrid +=3D __builtin_popcount(modes); + addrid +=3D ctpop8(modes); modes =3D 0; hartid++; } else { @@ -397,7 +397,7 @@ static void parse_hart_config(SiFivePLICState *plic) } } if (modes) { - addrid +=3D __builtin_popcount(modes); + addrid +=3D ctpop8(modes); } hartid++; =20 --=20 2.21.0