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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 05/23] target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps
Date: Fri, 27 Jan 2023 15:24:13 -1000	[thread overview]
Message-ID: <358331ce-ee3e-4355-5982-bf4e0b5aa444@linaro.org> (raw)
In-Reply-To: <20230127175507.2895013-6-peter.maydell@linaro.org>

On 1/27/23 07:54, Peter Maydell wrote:
> The HSTR_EL2 register has a collection of trap bits which allow
> trapping to EL2 for AArch32 EL0 or EL1 accesses to coprocessor
> registers.  The specification of these bits is that when the bit is
> set we should trap
>   * EL1 accesses
>   * EL0 accesses, if the access is not UNDEFINED when the
>     trap bit is 0
> 
> In other words, all UNDEF traps from EL0 to EL1 take precedence over
> the HSTR_EL2 trap to EL2.  (Since this is all AArch32, the only kind
> of trap-to-EL1 is the UNDEF.)
> 
> Our implementation doesn't quite get this right -- we check for traps
> in the order:
>   * no such register
>   * ARMCPRegInfo::access bits
>   * HSTR_EL2 trap bits
>   * ARMCPRegInfo::accessfn
> 
> So UNDEFs that happen because of the access bits or because the
> register doesn't exist at all correctly take priority over the
> HSTR_EL2 trap, but where a register can UNDEF at EL0 because of the
> accessfn we are incorrectly always taking the HSTR_EL2 trap.  There
> aren't many of these, but one example is the PMCR; if you look at the
> access pseudocode for this register you can see that UNDEFs taken
> because of the value of PMUSERENR.EN are checked before the HSTR_EL2
> bit.
> 
> Rearrange helper_access_check_cp_reg() so that we always call the
> accessfn, and use its return value if it indicates that the access
> traps to EL0 rather than continuing to do the HSTR_EL2 check.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/op_helper.c | 21 ++++++++++++++++-----
>   1 file changed, 16 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


  reply	other threads:[~2023-01-28  1:25 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-27 17:54 [PATCH 00/23] target/arm: Implement FEAT_FGT fine-grained traps Peter Maydell
2023-01-27 17:54 ` [PATCH 01/23] target/arm: Name AT_S1E1RP and AT_S1E1WP cpregs correctly Peter Maydell
2023-01-28  1:01   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 02/23] target/arm: Correct syndrome for ATS12NSO* at Secure EL1 Peter Maydell
2023-01-28  1:04   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 03/23] target/arm: Remove CP_ACCESS_TRAP_UNCATEGORIZED_{EL2, EL3} Peter Maydell
2023-01-28  1:11   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 04/23] target/arm: Move do_coproc_insn() syndrome calculation earlier Peter Maydell
2023-01-28  1:13   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 05/23] target/arm: All UNDEF-at-EL0 traps take priority over HSTR_EL2 traps Peter Maydell
2023-01-28  1:24   ` Richard Henderson [this message]
2023-01-27 17:54 ` [PATCH 06/23] target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1 Peter Maydell
2023-01-28  1:47   ` Richard Henderson
2023-01-28 14:34     ` Peter Maydell
2023-01-27 17:54 ` [PATCH 07/23] target/arm: Disable HSTR_EL2 traps if EL2 is not enabled Peter Maydell
2023-01-28  1:51   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 08/23] target/arm: Define the FEAT_FGT registers Peter Maydell
2023-01-28  2:31   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 09/23] target/arm: Implement FGT trapping infrastructure Peter Maydell
2023-01-28  2:36   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 10/23] target/arm: Mark up sysregs for HFGRTR bits 0..11 Peter Maydell
2023-01-28  2:36   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 11/23] target/arm: Mark up sysregs for HFGRTR bits 12..23 Peter Maydell
2023-01-28  2:41   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 12/23] target/arm: Mark up sysregs for HFGRTR bits 24..35 Peter Maydell
2023-01-28  2:43   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 13/23] target/arm: Mark up sysregs for HFGRTR bits 36..63 Peter Maydell
2023-01-28  2:50   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 14/23] target/arm: Mark up sysregs for HDFGRTR bits 0..11 Peter Maydell
2023-01-28  2:52   ` Richard Henderson
2023-01-27 17:54 ` [PATCH 15/23] target/arm: Mark up sysregs for HDFGRTR bits 12..63 Peter Maydell
2023-01-28 23:44   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 16/23] target/arm: Mark up sysregs for HFGITR bits 0..11 Peter Maydell
2023-01-28 23:47   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 17/23] target/arm: Mark up sysregs for HFGITR bits 12..17 Peter Maydell
2023-01-28 23:47   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 18/23] target/arm: Mark up sysregs for HFGITR bits 18..47 Peter Maydell
2023-01-28 23:49   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 19/23] target/arm: Mark up sysregs for HFGITR bits 48..63 Peter Maydell
2023-01-28 23:50   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 20/23] target/arm: Implement the HFGITR_EL2.ERET trap Peter Maydell
2023-01-28 23:53   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 21/23] target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 traps Peter Maydell
2023-01-28 23:58   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 22/23] target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC traps Peter Maydell
2023-01-29  0:06   ` Richard Henderson
2023-01-27 17:55 ` [PATCH 23/23] target/arm: Enable FEAT_FGT on '-cpu max' Peter Maydell
2023-01-29  0:07   ` Richard Henderson
2023-01-27 18:43 ` [PATCH 00/23] target/arm: Implement FEAT_FGT fine-grained traps Peter Maydell

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