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(p200300EA8BC4DC002CE0316DCEC15433.dip0.t-ipconnect.de. [2003:ea:8bc4:dc00:2ce0:316d:cec1:5433]) by smtp.googlemail.com with ESMTPSA id y2sm3869325wmy.38.2019.03.20.11.15.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 20 Mar 2019 11:15:21 -0700 (PDT) Subject: Re: regression from: net: phy: marvell: Avoid unnecessary soft reset To: liweihang , Florian Fainelli , Phil Reid , "netdev@vger.kernel.org" Cc: Andrew Lunn , "David S. Miller" , "dongsheng.wang@hxt-semitech.com" , "cphealy@gmail.com" , "clemens.gruber@pqgruber.com" , "nbd@nbd.name" , "harini.katakam@xilinx.com" References: <20180925182846.30042-1-f.fainelli@gmail.com> <20180925182846.30042-3-f.fainelli@gmail.com> <5ddf46b1-1959-832d-c6a5-86d8f93dc409@electromag.com.au> <7338bda7-541a-ed20-0afa-f5840c8fd131@gmail.com> <36fe3206-763d-41f8-bb9e-fa3067d78f2f@electromag.com.au> <5e258872-34cf-f82f-bcbc-539a74ba8561@gmail.com> From: Heiner Kallweit Message-ID: <416d3171-492d-2c9f-168a-88c5d2814db2@gmail.com> Date: Wed, 20 Mar 2019 19:15:16 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 20.03.2019 13:22, liweihang wrote: > > >> -----Original Message----- >> From: Florian Fainelli [mailto:f.fainelli@gmail.com] >> Sent: Wednesday, March 20, 2019 11:37 AM >> To: liweihang ; Phil Reid >> ; netdev@vger.kernel.org >> Cc: Andrew Lunn ; David S. Miller >> ; dongsheng.wang@hxt-semitech.com; >> cphealy@gmail.com; clemens.gruber@pqgruber.com; hkallweit1@gmail.com; >> nbd@nbd.name; harini.katakam@xilinx.com >> Subject: Re: regression from: net: phy: marvell: Avoid unnecessary soft reset >> >> >> >> On 3/19/2019 7:34 PM, liweihang wrote: >>> Hi all, >>> >>> I've met a similar issue and sent an email to discuss about it before: >>> Question about setting speed and duplex failed after auto-negotiation >>> disabled on marvell phy >>> >>> d6ab93364734 net: phy: marvell: Avoid unnecessary soft reset I >>> reverted this patch and the auto-negotiation works ok. >>> >>> Florian, could you please read my previous email and give me some advice? >> >> If you can copy the patch author on that email the next time that will help >> expedite things. >> >> So the problem seems to come from the fact that unless the BCMR_RESET bit >> is written, then m88e1121_config_aneg_rgmii_delays() has no effect, does >> that sound like what you are observing? >> >> Does the following work for you (Phil and yourself)? > > Thank you, Florian. But that didn't work for me either. I think the key question is > as what Heiner said, some bits need to be preserved. > > The MII_BMCR contained information of speed and duplex mode, but when we > call genphy_soft_reset(), these bits will be cleared. > I think instead of ret = phy_write(phydev, MII_BMCR, BMCR_RESET); we should use ret = phy_set_bits(phydev, MII_BMCR, BMCR_RESET); This is still in line with Clause 22 but covers more PHY's. A lot of PHY's won't be affected because they reset all BMCR bits to a default anyway. Could you please test this? If it's ok for you I'd submit a patch. >> >> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index >> 3ccba37bd6dd..6a1ea4c2042a 100644 >> --- a/drivers/net/phy/marvell.c >> +++ b/drivers/net/phy/marvell.c >> @@ -448,6 +448,10 @@ static int m88e1121_config_aneg(struct phy_device >> *phydev) >> err = m88e1121_config_aneg_rgmii_delays(phydev); >> if (err < 0) >> return err; >> + >> + err = genphy_soft_reset(phydev); >> + if (err < 0) >> + return err; >> } >> >> err = marvell_set_polarity(phydev, phydev->mdix_ctrl); >> >