On 2011-05-19 10:26, Gleb Natapov wrote:
> On Wed, May 18, 2011 at 09:27:55PM +0200, Jan Kiszka wrote:
>>> if an I/O is to the APIC page,
>>>    it's handled by the APIC
>>
>> That's not that simple. We need to tell apart:
>>  - if a cpu issued the request, and which one => forward to APIC
> And cpu mode may affect where access is forwarded to. If cpu is in SMM
> mode access to frame buffer may be forwarded to a memory (depends on
> chipset configuration).

So we have a second use case for CPU-local I/O regions?

I wonder if only a single CPU can enter SMM or if all have to. Right now
only the first CPU can switch to that mode, and that affects the
behaviour of the chipset /wrt SMRAM mapping. Is that another hack?

Jan