diff for duplicates of <52D81ED1-AEF7-43C8-84A4-98E1D895CD0B@suse.de>

diff --git a/a/1.txt b/N1/1.txt
index 51b426b..3c0e1f0 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -4,16 +4,18 @@ On 12.07.2012, at 00:43, Benjamin Herrenschmidt wrote:
 > On Thu, 2012-07-12 at 00:35 +0200, Alexander Graf wrote:
 >>> On Thu, 2012-07-12 at 00:25 +0200, Alexander Graf wrote:
 >>>> Or just free up another register early on, like here.
->>> 
+>>>=20
 >>> If you're going to do that, you want to measure the impact on null
 >>> syscall performance though.
->> 
+>>=20
 >> That should hold true for any change in that code, no?
-> 
+>=20
 > Yes, but adding a gpr save is more invasive (you have to also load it
 > back later on & put it on the stack).
 
-What's the usual cache line size like on these boxes? If you align it properly with r10 and r11 on the paca so that all 3 registers are in the same cache line, the load should be almost for free, no?
+What's the usual cache line size like on these boxes? If you align it =
+properly with r10 and r11 on the paca so that all 3 registers are in the =
+same cache line, the load should be almost for free, no?
 
 
 Alex
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index 1107600..24b5992 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -44,11 +44,11 @@
   "To\0Benjamin Herrenschmidt <benh\@kernel.crashing.org>\0"
 ]
 [
-  "Cc\0Caraman Mihai Claudiu-B02008 <B02008\@freescale.com>",
-  " <kvm-ppc\@vger.kernel.org> <kvm-ppc\@vger.kernel.org>",
-  " KVM list <kvm\@vger.kernel.org>",
+  "Cc\0qemu-ppc\@nongnu.org List <qemu-ppc\@nongnu.org>",
+  " Caraman Mihai Claudiu-B02008 <B02008\@freescale.com>",
   " linuxppc-dev <linuxppc-dev\@lists.ozlabs.org>",
-  " qemu-ppc\@nongnu.org List <qemu-ppc\@nongnu.org>\0"
+  " KVM list <kvm\@vger.kernel.org>",
+  " <kvm-ppc\@vger.kernel.org> <kvm-ppc\@vger.kernel.org>\0"
 ]
 [
   "\0000:1\0"
@@ -63,19 +63,21 @@
   "> On Thu, 2012-07-12 at 00:35 +0200, Alexander Graf wrote:\n",
   ">>> On Thu, 2012-07-12 at 00:25 +0200, Alexander Graf wrote:\n",
   ">>>> Or just free up another register early on, like here.\n",
-  ">>> \n",
+  ">>>=20\n",
   ">>> If you're going to do that, you want to measure the impact on null\n",
   ">>> syscall performance though.\n",
-  ">> \n",
+  ">>=20\n",
   ">> That should hold true for any change in that code, no?\n",
-  "> \n",
+  ">=20\n",
   "> Yes, but adding a gpr save is more invasive (you have to also load it\n",
   "> back later on & put it on the stack).\n",
   "\n",
-  "What's the usual cache line size like on these boxes? If you align it properly with r10 and r11 on the paca so that all 3 registers are in the same cache line, the load should be almost for free, no?\n",
+  "What's the usual cache line size like on these boxes? If you align it =\n",
+  "properly with r10 and r11 on the paca so that all 3 registers are in the =\n",
+  "same cache line, the load should be almost for free, no?\n",
   "\n",
   "\n",
   "Alex"
 ]
 
-2b71fb325f500561a523eba1f2c89621014f2d01e168ba65d4e719c0a0b072d6
+da6a36b9948f23869ee298365a4813da4d4bab7be2fe93798a5a2850554c872f
