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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id e17sm6493760wru.7.2021.08.20.10.02.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Aug 2021 10:02:33 -0700 (PDT) Subject: Re: [PULL 03/33] i386: split cpu accelerators from cpu.c, using AccelCPUClass To: Peter Maydell , Paolo Bonzini , Connor Kuehl , "Dr. David Alan Gilbert" References: <20210511081350.419428-1-pbonzini@redhat.com> <20210511081350.419428-4-pbonzini@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <54fae2d9-db1e-fbd0-e58a-0c2b5ab0f046@redhat.com> Date: Fri, 20 Aug 2021 19:02:32 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -49 X-Spam_score: -5.0 X-Spam_bar: ----- X-Spam_report: (-5.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.49, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , =?UTF-8?Q?Alex_Benn=c3=a9e?= , QEMU Developers , Claudio Fontana Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/20/21 6:55 PM, Peter Maydell wrote: > On Tue, 11 May 2021 at 09:22, Paolo Bonzini wrote: >> >> From: Claudio Fontana >> >> i386 is the first user of AccelCPUClass, allowing to split >> cpu.c into: >> >> cpu.c cpuid and common x86 cpu functionality >> host-cpu.c host x86 cpu functions and "host" cpu type >> kvm/kvm-cpu.c KVM x86 AccelCPUClass >> hvf/hvf-cpu.c HVF x86 AccelCPUClass >> tcg/tcg-cpu.c TCG x86 AccelCPUClass >> >> Signed-off-by: Claudio Fontana >> Reviewed-by: Alex Bennée >> Reviewed-by: Richard Henderson >> >> [claudio]: >> Rebased on commit b8184135 ("target/i386: allow modifying TCG phys-addr-bits") >> >> Signed-off-by: Claudio Fontana >> Message-Id: <20210322132800.7470-5-cfontana@suse.de> >> Signed-off-by: Paolo Bonzini >> --- > >> diff --git a/MAINTAINERS b/MAINTAINERS >> index b692c8fbee..c2723b32cb 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -351,7 +351,7 @@ M: Paolo Bonzini >> M: Richard Henderson >> M: Eduardo Habkost >> S: Maintained >> -F: target/i386/ >> +F: target/i386/tcg/ >> F: tests/tcg/i386/ >> F: tests/tcg/x86_64/ >> F: hw/i386/ > > This change to MAINTAINERS has left all the .c files > in target/i386 that are not in one of the tcg, hvf, whpx, > kvm, hax, nvmm subdirectories orphaned -- they are no > longer covered by any MAINTAINERS section. > > Where should those files be listed ? > > (I just discovered this when get_maintainers.pl said it couldn't > find a maintainer for a change I made to target/i386/sev.c.) This patch maybe got lost: https://www.mail-archive.com/qemu-devel@nongnu.org/msg816326.html