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From: Peter Hurley <peter@hurleysoftware.com>
To: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: "Daniel Vetter" <daniel.vetter@ffwll.ch>,
	"Michel Dänzer" <michel@daenzer.net>,
	"DRI Development" <dri-devel@lists.freedesktop.org>,
	"Daniel Vetter" <daniel.vetter@intel.com>,
	"Intel Graphics Development" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/vblank: Fixup and document timestamp update/read barriers
Date: Thu, 16 Apr 2015 08:52:26 -0400	[thread overview]
Message-ID: <552FB08A.5030400@hurleysoftware.com> (raw)
In-Reply-To: <552F5929.4040101@gmail.com>

On 04/16/2015 02:39 AM, Mario Kleiner wrote:
> On 04/16/2015 03:29 AM, Peter Hurley wrote:
>> On 04/15/2015 05:26 PM, Mario Kleiner wrote:

>> Because the time scales for these events don't require that level of
>> resolution; consider how much code has to get executed between a
>> hardware vblank irq triggering and the vblank counter being updated.
>>
>> Realistically, the only relevant requirement is that the timestamp
>> match the counter.
>>
> 
> Yes that is the really important part. A msec delay would possibly matter for some timing sensitive apps like mine - some more exotic displays run at 200 Hz, and some apps need to synchronize to the vblank not strictly for graphics. But i assume potential delays here are more on the order of a few microseconds if some pending loads from the cache would get reordered for overall efficiency?

I'd be surprised if the delay were as much as 1 us.

The latency to return to userspace significantly dwarfs any observable
effects having missed the vblank count update by 1 instruction.

Regards,
Peter Hurley
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-04-16 12:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-15  7:17 [PATCH] drm/vblank: Fixup and document timestamp update/read barriers Daniel Vetter
2015-04-15  8:17 ` Chris Wilson
2015-04-15  9:25   ` Daniel Vetter
2015-04-15  9:36     ` Chris Wilson
2015-04-15 10:32 ` Daniel Vetter
2015-04-15 17:34   ` Daniel Vetter
2015-04-15 17:49     ` Chris Wilson
2015-04-15 21:26     ` Mario Kleiner
2015-04-16  1:29       ` Peter Hurley
2015-04-16  6:39         ` Mario Kleiner
2015-04-16  9:00           ` Peter Hurley
2015-04-16  9:06             ` Daniel Vetter
2015-04-16 12:52           ` Peter Hurley [this message]
2015-04-16  8:54       ` Daniel Vetter
2015-04-16  0:17     ` shuang.he
2015-04-16  8:59     ` Daniel Vetter
2015-04-17  4:27       ` shuang.he
2015-04-16  0:18   ` shuang.he
2015-04-15 13:00 ` Peter Hurley
2015-04-15 17:31   ` Daniel Vetter
2015-04-16 12:30     ` Peter Hurley
2015-04-16 13:03       ` [Intel-gfx] " Daniel Vetter
2015-05-04  4:52         ` Mario Kleiner
2015-05-05 14:36           ` Peter Hurley
2015-05-05 15:42             ` [Intel-gfx] " Daniel Vetter
2015-05-05 15:57               ` Peter Hurley
2015-05-05 19:01                 ` Peter Hurley
2015-05-06  8:56                 ` Daniel Vetter
2015-05-07 11:56                   ` [Intel-gfx] " Peter Hurley
2015-05-07 17:33                     ` Mario Kleiner
2015-04-15 19:40 ` shuang.he

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