From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33612) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yscnp-0004rU-Tr for qemu-devel@nongnu.org; Wed, 13 May 2015 15:58:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yscnn-0002tB-7d for qemu-devel@nongnu.org; Wed, 13 May 2015 15:58:49 -0400 Received: from mail-qk0-x22c.google.com ([2607:f8b0:400d:c09::22c]:35500) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yscnn-0002st-2G for qemu-devel@nongnu.org; Wed, 13 May 2015 15:58:47 -0400 Received: by qkgy4 with SMTP id y4so36076419qkg.2 for ; Wed, 13 May 2015 12:58:46 -0700 (PDT) Sender: Richard Henderson Message-ID: <5553ACF2.7050708@twiddle.net> Date: Wed, 13 May 2015 12:58:42 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1431531457-17127-1-git-send-email-yongbok.kim@imgtec.com> <1431531457-17127-3-git-send-email-yongbok.kim@imgtec.com> <5553A5C4.6030902@twiddle.net> In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Maciej W. Rozycki" Cc: Yongbok Kim , peter.maydell@linaro.org, leon.alrae@imgtec.com, qemu-devel@nongnu.org, afaerber@suse.de On 05/13/2015 12:56 PM, Maciej W. Rozycki wrote: > We must have a way to deal with memory access operations issued by a > single machine instruction crossing a page boundary already as this is > what MIPS16 SAVE and RESTORE instructions as well as microMIPS SWP, SDP, > SWM, SDM, LWP, LDP, LWM and LDM ones do. Perhaps these are worth > looking into and their approach copying (or reusing) here? Certainly we do. It's all in softmmu_template.h. r~