From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysv2l-0002Se-5N for qemu-devel@nongnu.org; Thu, 14 May 2015 11:27:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ysv2g-0001Lg-73 for qemu-devel@nongnu.org; Thu, 14 May 2015 11:27:27 -0400 Received: from mail-qc0-x22a.google.com ([2607:f8b0:400d:c01::22a]:33865) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysv2g-0001KE-43 for qemu-devel@nongnu.org; Thu, 14 May 2015 11:27:22 -0400 Received: by qcyk17 with SMTP id k17so41475478qcy.1 for ; Thu, 14 May 2015 08:27:21 -0700 (PDT) Sender: Richard Henderson Message-ID: <5554BED5.3070802@twiddle.net> Date: Thu, 14 May 2015 08:27:17 -0700 From: Richard Henderson MIME-Version: 1.0 References: <1431531457-17127-1-git-send-email-yongbok.kim@imgtec.com> <1431531457-17127-3-git-send-email-yongbok.kim@imgtec.com> <5553A5C4.6030902@twiddle.net> <55546FF2.1030405@imgtec.com> In-Reply-To: <55546FF2.1030405@imgtec.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 2/2] target-mips: Misaligned memory accesses for MSA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Leon Alrae , Yongbok Kim , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, afaerber@suse.de On 05/14/2015 02:50 AM, Leon Alrae wrote: > Just to confirm -– before using helper_ret_*_mmu directly we should also > check if we can take fast-path (not sure if “fast-path” is correct term > in this case as we've already generated a call to helper function...): > > if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ != > (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { Nearly. You don't want the (DATA_SIZE - 1) part -- that exists to catch misalignment. You do need the test from helper_le_st_name: target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write; if ((addr & TARGET_PAGE_MASK) != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { if (!VICTIM_TLB_HIT(addr_write)) { tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); } } And before we spread that code around too much, I think we ought to create another helper. Perhaps void probe_read(CPUArchState *env, target_ulong addr, int mmu_idx, uintptr_t retaddr); void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, uintptr_t retaddr); > BTW what is the reason that we aren't passing GETRA() to cpu_##insn##_* > and using helper_ret_*_mmu directly in general? Because cpu_insn_* is the older interface which hasn't been removed yet. r~