From: Richard Henderson <rth@twiddle.net>
To: Chen Gang <xili_gchen_5257@hotmail.com>,
Peter Maydell <peter.maydell@linaro.org>,
Chris Metcalf <cmetcalf@ezchip.com>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 1/4] target-tilegx: Add fpu header file
Date: Thu, 12 Nov 2015 15:34:27 +0100 [thread overview]
Message-ID: <5644A373.5060503@twiddle.net> (raw)
In-Reply-To: <COL130-W5173AC7B4DBB9A33083E7DB9160@phx.gbl>
On 11/08/2015 06:43 AM, Chen Gang wrote:
> +#if !defined(HOST_WORDS_BIGENDIAN)
> + /* According to float(uns)sisf2 and float(uns)sidf2 in gcc tilegx.md */
> + uint64_t exp : 8; /* exp, 0x9e: 31 + TILEGX_F_EXP_FZERO */
> + uint64_t uiknown0 : 2; /* unknown */
I would really rather you didn't use bitfields, because of exactly this sort of
endianness problem. Because, really, you can't trust this layout. But I won't
press this point, because it is complicated enough already.
> +#endif
> +} TileGXFPSFmt;
> +/*
Watch your spacing.
> + * Double exp analyzing: (0x21b00 << 1) - 0x36(54) = 0x400
> + *
> + * 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
> + *
> + * 1 0 0 0 0 1 1 0 1 1 0 0 0 0 0 0 0 0
> + *
> + * 0 0 0 0 0 1 1 0 1 1 1 => 0x37(55)
> + *
> + * 0 1 1 1 1 1 1 1 1 1 1 => 0x3ff
What is this table supposed to mean?
> +#if 0
> + uint64_t exp : 11; /* exp, 0x21b << 1: 55 + TILEGX_F_EXP_DZERO */
> + uint64_t ov : 1; /* overflow for mul, low priority */
> + uint64_t uv : 1; /* underflow for mul, high priority */
> +#endif
No if 0.
> +#pragma pack(pop)
Huh? What are you attempting to do here?
r~
next prev parent reply other threads:[~2015-11-12 14:34 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-08 5:42 [Qemu-devel] [PATCH 0/4] Implment fpu floating point instructions Chen Gang
2015-11-08 5:43 ` [Qemu-devel] [PATCH 1/4] target-tilegx: Add fpu header file Chen Gang
2015-11-12 14:34 ` Richard Henderson [this message]
2015-11-12 16:04 ` Chen Gang
2015-11-12 16:10 ` Peter Maydell
2015-11-12 16:28 ` Chen Gang
2015-11-08 5:44 ` [Qemu-devel] [PATCH 2/4] target-tilegx: Implement fpu single floating point Chen Gang
2015-11-12 14:36 ` Richard Henderson
2015-11-12 16:12 ` Chen Gang
2015-11-12 16:18 ` Richard Henderson
2015-11-12 16:29 ` Chen Gang
2015-11-08 5:46 ` [Qemu-devel] [PATCH 3/4] target-tilegx: Implement fpu fdouble " Chen Gang
2015-11-08 5:47 ` [Qemu-devel] [PATCH 4/4] target-tilegx: Let fpu implementation code can be built and used Chen Gang
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