From: "Kamble, Sagar A" <sagar.a.kamble@intel.com>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/skl: Double RC6 WRL always on
Date: Tue, 8 Dec 2015 10:55:55 +0530 [thread overview]
Message-ID: <566669E3.5080108@intel.com> (raw)
In-Reply-To: <1449505785-20812-2-git-send-email-mika.kuoppala@intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
On 12/7/2015 9:59 PM, Mika Kuoppala wrote:
> WaRsDoubleRc6WrlWithCoarsePowerGating should
> be enabled for all Skylakes. Make it so.
>
> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7096c06..8598456 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4673,8 +4673,7 @@ static void gen9_enable_rc6(struct drm_device *dev)
> /* 2b: Program RC6 thresholds.*/
>
> /* WaRsDoubleRc6WrlWithCoarsePowerGating: Doubling WRL only when CPG is enabled */
> - if (IS_SKYLAKE(dev) && !((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) &&
> - IS_SKL_REVID(dev, 0, SKL_REVID_E0)))
> + if (IS_SKYLAKE(dev))
> I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 108 << 16);
> else
> I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 54 << 16);
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next prev parent reply other threads:[~2015-12-08 5:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-07 16:29 [PATCH 1/2] drm/i915/skl: Disable coarse power gating up until F0 Mika Kuoppala
2015-12-07 16:29 ` [PATCH 2/2] drm/i915/skl: Double RC6 WRL always on Mika Kuoppala
2015-12-08 5:25 ` Kamble, Sagar A [this message]
2015-12-08 9:33 ` [PATCH 1/2] drm/i915/skl: Disable coarse power gating up until F0 Kamble, Sagar A
2015-12-08 14:23 ` Jani Nikula
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