From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E735CC433ED for ; Tue, 6 Apr 2021 19:22:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C134F6139C for ; Tue, 6 Apr 2021 19:22:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241142AbhDFTWI (ORCPT ); Tue, 6 Apr 2021 15:22:08 -0400 Received: from marcansoft.com ([212.63.210.85]:49944 "EHLO mail.marcansoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229488AbhDFTWF (ORCPT ); Tue, 6 Apr 2021 15:22:05 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: marcan@marcan.st) by mail.marcansoft.com (Postfix) with ESMTPSA id 30DF941E64; Tue, 6 Apr 2021 19:21:48 +0000 (UTC) To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Arnd Bergmann , Olof Johansson , Krzysztof Kozlowski , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Linus Walleij , Mark Rutland , Andy Shevchenko , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org References: <20210402090542.131194-1-marcan@marcan.st> <20210402090542.131194-16-marcan@marcan.st> <87ft03p9cd.wl-maz@kernel.org> From: Hector Martin Subject: Re: [PATCH v4 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller Message-ID: <5a4a0ab4-5a4e-1f1c-f6c6-97439b95e7ee@marcan.st> Date: Wed, 7 Apr 2021 04:21:46 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <87ft03p9cd.wl-maz@kernel.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: es-ES Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/04/2021 03.16, Marc Zyngier wrote: > Hi Hector, > > On Fri, 02 Apr 2021 10:05:39 +0100, > Hector Martin wrote: >> + /* >> + * In EL1 the non-redirected registers are the guest's, >> + * not EL2's, so remap the hwirqs to match. >> + */ >> + if (!is_kernel_in_hyp_mode()) { >> + switch (fwspec->param[1]) { >> + case AIC_TMR_GUEST_PHYS: >> + *hwirq = ic->nr_hw + AIC_TMR_HV_PHYS; >> + break; >> + case AIC_TMR_GUEST_VIRT: >> + *hwirq = ic->nr_hw + AIC_TMR_HV_VIRT; >> + break; >> + case AIC_TMR_HV_PHYS: >> + case AIC_TMR_HV_VIRT: >> + return -ENOENT; >> + default: >> + break; >> + } >> + } > > Urgh, this is nasty. You are internally remapping the hwirq from one > timer to another in order to avoid accessing the enable register > which happens to be an EL2 only register? The remapping is to make the IRQs route properly at all. There are EL2 and EL0 timers, and on GIC each timer goes to its own IRQ. But here there are no real IRQs, everything's a FIQ. However, thanks to VHE, the EL2 timer shows up as the EL0 timer, and the EL0 timer is accessed via EL02 registers, when in EL2. So in EL2/VHE mode, "HV" means EL0 and "guest" means EL02, while in EL1, there is no HV and "guest" means EL0. And since we figure out which IRQ fired by reading timer registers, this is what matters. So I map the guest IRQs to the HV hwirqs in EL1 mode, which makes this all work out. Then the timer code goes and ends up undoing all this logic again, so we map to separate fake "IRQs" only to end up right back at using the same timer registers anuway :-) Really, the ugliness here is that the constant meaning is overloaded. In fwspec context they mean what they say on the tin, while in hwirq context "HV" means EL0 and "guest" means EL02 (other FIQs would be passed through unchanged). Perhaps some additional defines might help clarify this? Say, at the top of this file (not in the binding), /* * Pass-through mapping from real timers to the correct registers to * access them in EL2/VHE mode. When running in EL1, this gets * overridden to access the guest timer using EL0 registers. */ #define AIC_TMR_EL0_PHYS AIC_TMR_HV_PHYS #define AIC_TMR_EL0_VIRT AIC_TMR_HV_VIRT #define AIC_TMR_EL02_PHYS AIC_TMR_GUEST_PHYS #define AIC_TMR_EL02_VIRT AIC_TMR_GUEST_VIRT Then the irqchip/FIQ dispatch side can use the EL* constants, the default pass-through mapping is appropriate for VHE/EL2 mode, and translation can adjust it for EL1 mode. -- Hector Martin (marcan@marcan.st) Public Key: https://mrcn.st/pub From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FEE6C433B4 for ; Tue, 6 Apr 2021 19:24:09 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AF26B61399 for ; Tue, 6 Apr 2021 19:24:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AF26B61399 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marcan.st Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:Subject: From:References:Cc:To:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Zv8VtvHx2kDnmD2eu7nPMSH28DA8BUtS8nStK7xUHas=; b=UTieIlg6Onhj9pPAjFEivndEP 820/IQZR5/4VuGSuQ3j5F4Qj8DgqY+ujctZGK8+W5wXhbd8AA9B3PE5fc3Xd1jQqKwEiye24/B33C jDhe2DFW5Fh7xMNwZgLLv/oOopDBUsBLlLDXaelV3anOl66gb6TBBSQ9Lzc+gW+Sy4eyPnEDecASE YgZb0gsH24yUw7tNQtYSE2AVkp9RKWUqt+T8jsKOsWfVDNKlOeg28j00n60kY+4Ll2LmbPnPRHVst e3sDLCF0kUATmNAcanXAFXPpzZ/r3Bq5W7sIE+xUlQCdMJkKH6r1ynuVruQsLe2Hqxv4FMEH8Juol A9SVxGedA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lTrH2-003Jaw-RU; Tue, 06 Apr 2021 19:22:05 +0000 Received: from marcansoft.com ([212.63.210.85] helo=mail.marcansoft.com) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lTrGy-003JaR-I0 for linux-arm-kernel@lists.infradead.org; Tue, 06 Apr 2021 19:22:02 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: marcan@marcan.st) by mail.marcansoft.com (Postfix) with ESMTPSA id 30DF941E64; Tue, 6 Apr 2021 19:21:48 +0000 (UTC) To: Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Arnd Bergmann , Olof Johansson , Krzysztof Kozlowski , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Linus Walleij , Mark Rutland , Andy Shevchenko , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org References: <20210402090542.131194-1-marcan@marcan.st> <20210402090542.131194-16-marcan@marcan.st> <87ft03p9cd.wl-maz@kernel.org> From: Hector Martin Subject: Re: [PATCH v4 15/18] irqchip/apple-aic: Add support for the Apple Interrupt Controller Message-ID: <5a4a0ab4-5a4e-1f1c-f6c6-97439b95e7ee@marcan.st> Date: Wed, 7 Apr 2021 04:21:46 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <87ft03p9cd.wl-maz@kernel.org> Content-Language: es-ES X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210406_202200_858733_F2D72B15 X-CRM114-Status: GOOD ( 24.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 07/04/2021 03.16, Marc Zyngier wrote: > Hi Hector, > > On Fri, 02 Apr 2021 10:05:39 +0100, > Hector Martin wrote: >> + /* >> + * In EL1 the non-redirected registers are the guest's, >> + * not EL2's, so remap the hwirqs to match. >> + */ >> + if (!is_kernel_in_hyp_mode()) { >> + switch (fwspec->param[1]) { >> + case AIC_TMR_GUEST_PHYS: >> + *hwirq = ic->nr_hw + AIC_TMR_HV_PHYS; >> + break; >> + case AIC_TMR_GUEST_VIRT: >> + *hwirq = ic->nr_hw + AIC_TMR_HV_VIRT; >> + break; >> + case AIC_TMR_HV_PHYS: >> + case AIC_TMR_HV_VIRT: >> + return -ENOENT; >> + default: >> + break; >> + } >> + } > > Urgh, this is nasty. You are internally remapping the hwirq from one > timer to another in order to avoid accessing the enable register > which happens to be an EL2 only register? The remapping is to make the IRQs route properly at all. There are EL2 and EL0 timers, and on GIC each timer goes to its own IRQ. But here there are no real IRQs, everything's a FIQ. However, thanks to VHE, the EL2 timer shows up as the EL0 timer, and the EL0 timer is accessed via EL02 registers, when in EL2. So in EL2/VHE mode, "HV" means EL0 and "guest" means EL02, while in EL1, there is no HV and "guest" means EL0. And since we figure out which IRQ fired by reading timer registers, this is what matters. So I map the guest IRQs to the HV hwirqs in EL1 mode, which makes this all work out. Then the timer code goes and ends up undoing all this logic again, so we map to separate fake "IRQs" only to end up right back at using the same timer registers anuway :-) Really, the ugliness here is that the constant meaning is overloaded. In fwspec context they mean what they say on the tin, while in hwirq context "HV" means EL0 and "guest" means EL02 (other FIQs would be passed through unchanged). Perhaps some additional defines might help clarify this? Say, at the top of this file (not in the binding), /* * Pass-through mapping from real timers to the correct registers to * access them in EL2/VHE mode. When running in EL1, this gets * overridden to access the guest timer using EL0 registers. */ #define AIC_TMR_EL0_PHYS AIC_TMR_HV_PHYS #define AIC_TMR_EL0_VIRT AIC_TMR_HV_VIRT #define AIC_TMR_EL02_PHYS AIC_TMR_GUEST_PHYS #define AIC_TMR_EL02_VIRT AIC_TMR_GUEST_VIRT Then the irqchip/FIQ dispatch side can use the EL* constants, the default pass-through mapping is appropriate for VHE/EL2 mode, and translation can adjust it for EL1 mode. -- Hector Martin (marcan@marcan.st) Public Key: https://mrcn.st/pub _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel