From: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
To: Amelie Delaunay <amelie.delaunay@st.com>,
Felipe Balbi <balbi@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
Fabrice Gasnier <fabrice.gasnier@st.com>
Subject: Re: [PATCH 2/3] usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTG
Date: Mon, 30 Nov 2020 06:17:08 +0000 [thread overview]
Message-ID: <68f6bfab-e720-ecf6-9623-342da80f7f41@synopsys.com> (raw)
In-Reply-To: <20201123090114.12641-3-amelie.delaunay@st.com>
On 11/23/2020 1:01 PM, Amelie Delaunay wrote:
> When the core is in FS host mode, using the FS transceiver, and a Low-Speed
> device is connected, transceiver clock is 6Mhz.
> So, to support Low-Speed devices, enable support of FS/LS Low Power mode,
> so that the PHY supplies a 6 MHz clock during Low-Speed mode.
>
> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
> ---
> drivers/usb/dwc2/params.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 0df693319f0a..9e5dd7f3f2f6 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -179,6 +179,8 @@ static void dwc2_set_stm32mp15_fsotg_params(struct dwc2_hsotg *hsotg)
> p->activate_stm_id_vb_detection = true;
> p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT;
> p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
> + p->host_support_fs_ls_low_power = true;
> + p->host_ls_low_power_phy_clk = true;
> }
>
> static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg)
>
next prev parent reply other threads:[~2020-11-30 6:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-23 9:01 [PATCH 0/3] STM32MP15 OTG params updates Amelie Delaunay
2020-11-23 9:01 ` [PATCH 1/3] usb: dwc2: set ahbcfg parameter for STM32MP15 OTG HS and FS Amelie Delaunay
2020-11-30 6:16 ` Minas Harutyunyan
2020-11-23 9:01 ` [PATCH 2/3] usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTG Amelie Delaunay
2020-11-30 6:17 ` Minas Harutyunyan [this message]
2020-11-23 9:01 ` [PATCH 3/3] usb: dwc2: disable Link Power Management on STM32MP15 HS OTG Amelie Delaunay
2020-11-30 6:17 ` Minas Harutyunyan
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