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diff for duplicates of <6e438ffc-4b80-4706-a767-7c84aa896348@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index d813bca..2b54cb4 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -18,9 +18,9 @@ On 08/03/18 18:12, Auger Eric wrote:
 >>>>>> "When the PE acknowledges an SGI, a PPI, or an SPI at the CPU
 >>>>>> interface, the IRI changes the status of the interrupt to active
 >>>>>> and pending if:
->>>>>> • It is an edge-triggered interrupt, and another edge has been
+>>>>>> ? It is an edge-triggered interrupt, and another edge has been
 >>>>>> detected since the interrupt was acknowledged.
->>>>>> • It is a level-sensitive interrupt, and the level has not been
+>>>>>> ? It is a level-sensitive interrupt, and the level has not been
 >>>>>> deasserted since the interrupt was acknowledged."
 >>>>>>
 >>>>>> GIC v2 specification IHI0048B.b has similar description on page
diff --git a/a/content_digest b/N1/content_digest
index 019a192..bb07e28 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -17,27 +17,16 @@
   "ref\0cf815673-e20e-c1e1-2d79-2f47261b2412\@redhat.com\0"
 ]
 [
-  "From\0Marc Zyngier <marc.zyngier\@arm.com>\0"
+  "From\0marc.zyngier\@arm.com (Marc Zyngier)\0"
 ]
 [
-  "Subject\0Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
+  "Subject\0[RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
 ]
 [
   "Date\0Fri, 9 Mar 2018 09:12:01 +0000\0"
 ]
 [
-  "To\0Auger Eric <eric.auger\@redhat.com>",
-  " Christoffer Dall <cdall\@kernel.org>\0"
-]
-[
-  "Cc\0Shunyong Yang <shunyong.yang\@hxt-semitech.com>",
-  " ard.biesheuvel\@linaro.org",
-  " will.deacon\@arm.com",
-  " david.daney\@cavium.com",
-  " linux-arm-kernel\@lists.infradead.org",
-  " kvmarm\@lists.cs.columbia.edu",
-  " linux-kernel\@vger.kernel.org",
-  " Joey Zheng <yu.zheng\@hxt-semitech.com>\0"
+  "To\0linux-arm-kernel\@lists.infradead.org\0"
 ]
 [
   "\0000:1\0"
@@ -66,9 +55,9 @@
   ">>>>>> \"When the PE acknowledges an SGI, a PPI, or an SPI at the CPU\n",
   ">>>>>> interface, the IRI changes the status of the interrupt to active\n",
   ">>>>>> and pending if:\n",
-  ">>>>>> \342\200\242 It is an edge-triggered interrupt, and another edge has been\n",
+  ">>>>>> ? It is an edge-triggered interrupt, and another edge has been\n",
   ">>>>>> detected since the interrupt was acknowledged.\n",
-  ">>>>>> \342\200\242 It is a level-sensitive interrupt, and the level has not been\n",
+  ">>>>>> ? It is a level-sensitive interrupt, and the level has not been\n",
   ">>>>>> deasserted since the interrupt was acknowledged.\"\n",
   ">>>>>>\n",
   ">>>>>> GIC v2 specification IHI0048B.b has similar description on page\n",
@@ -330,4 +319,4 @@
   "Jazz is not dead. It just smells funny..."
 ]
 
-e745436a92bc7d9d196429ab2698193cf2977cade2f18a858ba37f681d1403c6
+15822f58ac14e97b74dc348dc9df122a8d8a3790caa3d9467253debe91f43167
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