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spf=pass smtp.mailfrom=xypron.glpk@gmx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1622715639; bh=U4SjKDsXD5A+iZM1nrr6gMDYp516RLDK6U9zenwBzrM=; h=X-UI-Sender-Class:Subject:To:Cc:References:From:Date:In-Reply-To; b=VpEDaTbmx7pA3qVqx/wcL71bipqS4oMoYB2aebTI5BC1XRJYj4NXb8hEOVCJgo43y LvGS3iwh4TP2mGkiHMYKuEKxxoKphtlZS69J3w9dDWZDtllsKa7p4KsXNbotOQZ51k ZVUWike2KW+b2+VLXuKlPaan4gdi4zatXbQzSaeo= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from [192.168.123.35] ([62.143.247.63]) by mail.gmx.net (mrgmx105 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MDywu-1lh0gl1Rqe-009wcF; Thu, 03 Jun 2021 12:20:39 +0200 Subject: Re: [BUG] network is broken on Orange Pi PC To: Andre Przywara Cc: Ramon Fried , Joe Hershberger , Jagan Teki , U-Boot Mailing List , Andreas Rehn References: <20210603100351.4b45ed0a@slackpad.fritz.box> From: Heinrich Schuchardt Message-ID: <73958455-9745-399a-6562-f31ee5f40cd5@gmx.de> Date: Thu, 3 Jun 2021 12:20:34 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.0 MIME-Version: 1.0 In-Reply-To: <20210603100351.4b45ed0a@slackpad.fritz.box> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:szMxNc7ue/qudM0PagvMOv80mYRc9nOucQbckM3CsmkDyt/Dmze VSlJISKrEC8eISypWUk/7WiKjdKMEmz9IABubq9la6SQyUcEjNCZEF1K9eWwqusAXKfBiGr nawgjWKWEnlD/4eAvwO7YlPw9zmJaqpQxa76ZN1bBIp//4bPmqKYRTGAKBbU6NqnQ0wQjHf CfeJyBtvz/G7ECL8dfm5g== X-UI-Out-Filterresults: notjunk:1;V03:K0:9fGHMJ5u71I=:eNxqHPCUTpyp1yloPGez9D TWA731ZQxGoiXaqLDTL7zem3F8x02w0KkzRZnBvAxHGS8b4niatC15abWEqnoUTo9zvN5CS+v 3kiyXyXSUZu+kIBpHm50IO/ThllPqt7+rLsrzDn9ZklogUJdGhAh6e/6v4BB29i+Dfomt9WMy MNJ9xacxJDoC/pbhTxt6pB/zKvOoOTm+VKhjZSP2nYS+q1CWE9qK4Y/BhbRycaVWmaRzNDurT Ndx3eUmXSOhCRGwugTDq/30Tjua5hLxyhaYVYE6OYD+N8jnHwFfp89fgQfdNokHBzStTgOL0s lcA6/D5nu8u9Rvx5ertOw+wdfzUcTf28O8/vah8Ovc3NGT3Glpyuf6SyK5OuOVYZdOOaUekk+ BHocPCkrwfaCe87Ar4UhDTB77DJEC+Ocg+yVQOMA82/VsisjLHOq2B6tMSfhhwM+6nj/EPBkf bBB1jL529nhSrff+ecP9q0wsTyERCYloMqMH0+J0qnWqIilT5PeaLUxkckmRvlU5Ywt+4BuG/ BCN8U/yT6/jCt6CzZxty5BacNLpqLvfDSfZxKBdyFSjLA5LhisQXTVUeRc3KTg9j2fgTuIa+U HIQRC+avhuBY/cNgZ/YfNzgbzVdCo/62OhjwHrfYGJfUlFws3adC1XpffBsEAbsB3K3pPglCG r4MSgPsU7Yr5nOkKVF0PKsZB0YMXCXogHiOENxVqSudXd9voFLElhoTdHO5FXWC3d0Ql1FjbI TRFZBJmOCbRIrWamJWK3x+FQ3HJMD75E3jKLz2wxHq7ivDe1UFnkgLP3yZtyfKIyalg4HYCoa Sy3hSTxXW4WwX5EGzpkBj7ry6rIxJbh5s1A6thFxnfLoIJOVR1yY2d2vzfMmXxTGsCiUeCmGJ BvdEMsZNlBJi75C+c5lmhbdwnq3M3Sl0FISI4gwjhFoyvO7XiTbLuNCigpCtsXBRnhiH5nfs6 o24JG1lbjTPcVT8oASxcp+ZzjAeFgyJgINbtDPG4zQdAawn5/MPAn+gIUNi1wv2wnW3n24InZ pyoOmtQUMHf1De/BvN8LwopjpKbVchcKIiApXVxRs+7+SbsuqJ3+b7wezmzCMolsC2Gzr5nJK rWYJsrnMHO2lCXLdCW1NoR5l4THaBPOID15 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean On 6/3/21 11:04 AM, Andre Przywara wrote: > On Thu, 3 Jun 2021 09:46:48 +0200 > Heinrich Schuchardt wrote: > > Hi Heinrich, > >> On 6/2/21 3:08 PM, Ramon Fried wrote: >>> On Tue, Jun 1, 2021 at 12:35 AM Heinrich Schuchardt wrote: >>>> >>>> Dear all, >>>> >>>> network is broken in U-Boot on orangepi_pc_defconfig: > > Thanks for the report! > >>>> >>>> U-Boot 2021.07-rc3-00059-gd8729a114e (May 31 2021 - 21:26:56 +0000) >>>> Allwinner Technology >>>> eth0: ethernet@1c30000 >>>> =3D> dhcp >>>> sun8i_emac_eth_start: Timeout >>>> >>>> Best regards >>>> >>>> Heinrich >>>> >>> Hi Heinrich, I don't have OrangePi. can you bisect and tell me when it= broke ? >>> Thanks. >>> Ramon. >>> >> >> Git bisect points to: >> >> commit 4f0278dac56a658ef1e0967fec0bb95372a875bd >> Author: Andre Przywara >> Date: Mon Jul 6 01:40:45 2020 +0100 >> >> net: sun8i-emac: Lower MDIO frequency >> >> Reverting the patch solves the problem for the OrangePi PC. >> >> According to the commit message the change was only needed for needed >> for external PHYs. > > The external PHY on the Pine64 (non-plus) was the trigger, however > both the manual and the Linux driver point to that we definitely need a > higher divider. From what I can see, AHB2 (the EMAC clock) runs at 200 > MHz (AHB2=3DAHB1/1=3DPLL6/3=3D200 MHz). So just having "/ 16" results in= 12.5 > MHz MDIO frequency. Can you check whether any other divider values fix > this for you as well? MDIO_CMD_MII_CLK_CSR_DIV_16 =3D 0 and this is the value that was used before your patch. MDIO_CMD_MII_CLK_CSR_DIV_16 =3D 0 =3D> Waiting for PHY auto negotiation to complete. done MDIO_CMD_MII_CLK_CSR_DIV_32 =3D 1 =3D> sun8i_emac_eth_start: Timeout MDIO_CMD_MII_CLK_CSR_DIV_64 =3D 2 =3D> sun8i_emac_eth_start: Timeout MDIO_CMD_MII_CLK_CSR_DIV_128 =3D 3 =3D> sun8i_emac_eth_start: Timeout What is wrong about the approach in [PATCH 1/1] net: sun8i-emac: fix MDIO frequency https://lists.denx.de/pipermail/u-boot/2021-June/451305.html ? The Linux 5.10 driver runs fine no matter what value we choose for the divider in U-Boot. But I see a message: dwmac-sun8i 1c30000.ethernet: Current syscon value is not the default 148000 (expect 58000) @default_syscon_value: The default value of the EMAC register in syscon This value is used for disabling properly EMAC and used as a good starting value in case of the boot process(uboot) leave some stuff. Best regards Heinrich > >> Can't we let the change depend on priv->use_internal_phy? >> >> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c >> index 5a1b38bf80..d7553fe163 100644 >> --- a/drivers/net/sun8i_emac.c >> +++ b/drivers/net/sun8i_emac.c >> @@ -211,7 +211,9 @@ static int sun8i_mdio_read(struct mii_dev *bus, int >> addr, int devad, int reg) >> * The EMAC clock is either 200 or 300 MHz, so we need a divi= der >> * of 128 to get the MDIO frequency below the required 2.5 MH= z. >> */ >> - mii_cmd |=3D MDIO_CMD_MII_CLK_CSR_DIV_128 << >> MDIO_CMD_MII_CLK_CSR_SHIFT; >> + if (!priv->use_internal_phy) >> + mii_cmd |=3D MDIO_CMD_MII_CLK_CSR_DIV_128 << >> + MDIO_CMD_MII_CLK_CSR_SHIFT; >> >> mii_cmd |=3D MDIO_CMD_MII_BUSY; >> >> @@ -242,7 +244,9 @@ static int sun8i_mdio_write(struct mii_dev *bus, in= t >> addr, int devad, int reg, >> * The EMAC clock is either 200 or 300 MHz, so we need a divi= der >> * of 128 to get the MDIO frequency below the required 2.5 MH= z. >> */ >> - mii_cmd |=3D MDIO_CMD_MII_CLK_CSR_DIV_128 << >> MDIO_CMD_MII_CLK_CSR_SHIFT; >> + if (!priv->use_internal_phy) >> + mii_cmd |=3D MDIO_CMD_MII_CLK_CSR_DIV_128 << >> + MDIO_CMD_MII_CLK_CSR_SHIFT; >> >> mii_cmd |=3D MDIO_CMD_MII_WRITE; >> mii_cmd |=3D MDIO_CMD_MII_BUSY; >> >> Best regards >> >> Heinrich >> >> I would assume the problem hits all H3 boards. > > And that's the confusing part: it does not. I tested this on my > OrangePi Zero (H2+ with internal PHY), both back then with the original > MDIO frequency patch and also now after your report. It always worked > reliably for me. > Also: I am still puzzled how one influences the other: The error you > get is from the *MAC* soft reset: I would think this is an independent > operation from any communication attempts with the PHY. > > There is this thread here about the same symptom on a V3s: > https://lists.denx.de/pipermail/u-boot/2021-May/450315.html > v2 of this original patch (in the same thread) proposes some other > solution, which I am also not very happy with. But just to get some more > data points: can you check whether skipping the soft reset fixes this > for you? I will have a closer look tonight to check the order of soft > reset and PHY communication. Maybe we should only do the soft reset > *once* when the MAC probes, and not on every .start call? > > Thanks, > Andre >