Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL

["Srivatsa, Anusha" <anusha.srivatsa@intel.com>]

>-----Original Message-----
>From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com]
>Sent: Friday, July 12, 2019 10:34 AM
>To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
>Cc: Navare, Manasi D <manasi.d.navare@intel.com>; intel-
>gfx@lists.freedesktop.org
>Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs supported
>by TGL
>
>On Fri, Jul 12, 2019 at 05:29:16PM +0000, Srivatsa, Anusha wrote:
>>
>>
>> >-----Original Message-----
>> >From: Navare, Manasi D
>> >Sent: Thursday, July 11, 2019 10:24 AM
>> >To: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>> >gfx@lists.freedesktop.org
>> >Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs
>> >supported by TGL
>> >
>> >On Thu, Jul 11, 2019 at 04:47:17PM +0300, Ville Syrjälä wrote:
>> >> On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote:
>> >> > DSC engine on ICL supports only 8 and 10 BPC as the input BPC.
>> >> > But DSC engine in TGL supports 8, 10 and 12 BPC.
>> >> > Add 12 BPC support for DSC while calculating compression
>> >> > configuration.
>> >> >
>> >> > Cc: Manasi Navare <manasi.d.navare@intel.com>
>> >> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> >> > ---
>> >> >  drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++--
>> >> >  1 file changed, 7 insertions(+), 2 deletions(-)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > index 0bdb7ecc5a81..cd089643c80d 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> >> > @@ -71,6 +71,7 @@
>> >> >  #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER	61440
>> >> >  #define DP_DSC_MIN_SUPPORTED_BPC		8
>> >> >  #define DP_DSC_MAX_SUPPORTED_BPC		10
>> >> > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC		12
>> >>
>> >> These defines aren't doing any good IMO. I'd just nuke them.
>> >
>> >So just remove all the #defines and use the values directly?
>>
>> Wont it make it less readable?
>
>It will be more readable because you don't have to go looking for those defines.
Ok. Then remove all #defines like Manasi pointed out?

Anusha 
>>
>> >>
>> >> >
>> >> >  /* DP DSC throughput values used for slice count calculations KPixels/s */
>> >> >  #define DP_DSC_PEAK_PIXEL_RATE			2720000
>> >> > @@ -1911,8 +1912,12 @@ static int
>> >> > intel_dp_dsc_compute_config(struct
>> >intel_dp *intel_dp,
>> >> >  	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
>> >> >  		return -EINVAL;
>> >> >
>> >> > -	dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC,
>> >> > -			    conn_state->max_requested_bpc);
>> >> > +	if (INTEL_GEN(dev_priv) > 11)
>> >>
>> >> More customarily >= 12
>> >
>> >I agree
>>
>> Makes sense.
>>
>> Anusha
>> >Manasi
>> >
>> >>
>> >> > +		dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC,
>> >> > +				    conn_state->max_requested_bpc);
>> >> > +	else
>> >> > +		dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC,
>> >> > +				    conn_state->max_requested_bpc);
>> >> >
>> >> >  	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc);
>> >> >  	if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) {
>> >> > --
>> >> > 2.21.0
>> >> >
>> >> > _______________________________________________
>> >> > Intel-gfx mailing list
>> >> > Intel-gfx@lists.freedesktop.org
>> >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>> >>
>> >> --
>> >> Ville Syrjälä
>> >> Intel
>> >> _______________________________________________
>> >> Intel-gfx mailing list
>> >> Intel-gfx@lists.freedesktop.org
>> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>--
>Ville Syrjälä
>Intel
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