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(p200300EA8BC4DC001C398416EBC95985.dip0.t-ipconnect.de. [2003:ea:8bc4:dc00:1c39:8416:ebc9:5985]) by smtp.googlemail.com with ESMTPSA id n11sm2973959wrt.63.2019.03.19.23.39.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Mar 2019 23:39:20 -0700 (PDT) Subject: Re: regression from: net: phy: marvell: Avoid unnecessary soft reset To: Phil Reid , Florian Fainelli , liweihang , "netdev@vger.kernel.org" Cc: Andrew Lunn , "David S. Miller" , "dongsheng.wang@hxt-semitech.com" , "cphealy@gmail.com" , "clemens.gruber@pqgruber.com" , "nbd@nbd.name" , "harini.katakam@xilinx.com" References: <20180925182846.30042-1-f.fainelli@gmail.com> <20180925182846.30042-3-f.fainelli@gmail.com> <5ddf46b1-1959-832d-c6a5-86d8f93dc409@electromag.com.au> <7338bda7-541a-ed20-0afa-f5840c8fd131@gmail.com> <36fe3206-763d-41f8-bb9e-fa3067d78f2f@electromag.com.au> <5e258872-34cf-f82f-bcbc-539a74ba8561@gmail.com> From: Heiner Kallweit Message-ID: <84ea24f9-1f6b-749c-3072-fa8046737384@gmail.com> Date: Wed, 20 Mar 2019 07:39:16 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 20.03.2019 06:16, Phil Reid wrote: > On 20/03/2019 11:37 am, Florian Fainelli wrote: >> >> >> On 3/19/2019 7:34 PM, liweihang wrote: >>> Hi all, >>> >>> I've met a similar issue and sent an email to discuss about it before: >>> Question about setting speed and duplex failed after auto-negotiation disabled on marvell phy >>> >>> d6ab93364734 net: phy: marvell: Avoid unnecessary soft reset >>> I reverted this patch and the auto-negotiation works ok. >>> >>> Florian, could you please read my previous email and give me some advice? >> >> If you can copy the patch author on that email the next time that will >> help expedite things. >> >> So the problem seems to come from the fact that unless the BCMR_RESET >> bit is written, then m88e1121_config_aneg_rgmii_delays() has no effect, >> does that sound like what you are observing? >> >> Does the following work for you (Phil and yourself)? >> >> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c >> index 3ccba37bd6dd..6a1ea4c2042a 100644 >> --- a/drivers/net/phy/marvell.c >> +++ b/drivers/net/phy/marvell.c >> @@ -448,6 +448,10 @@ static int m88e1121_config_aneg(struct phy_device >> *phydev) >>                  err = m88e1121_config_aneg_rgmii_delays(phydev); >>                  if (err < 0) >>                          return err; >> + >> +               err = genphy_soft_reset(phydev); >> +               if (err < 0) >> +                       return err; >>          } >> >>          err = marvell_set_polarity(phydev, phydev->mdix_ctrl); >> > > > G'day Florian, > > Nope that didn't work for me. > But based on that patch and liweihang email I found the following works for me: > > diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c > index 46c8672..de71aef 100644 > --- a/drivers/net/phy/phy_device.c > +++ b/drivers/net/phy/phy_device.c > @@ -1827,7 +1827,13 @@ int genphy_soft_reset(struct phy_device *phydev) >  { >         int ret; > > -       ret = phy_write(phydev, MII_BMCR, BMCR_RESET); > +       phydev_err(phydev, "genphy_soft_reset"); > + > +       ret = phy_read(phydev, MII_BMCR); > +       if (ret < 0) > +               return ret; > + > +       ret = phy_write(phydev, MII_BMCR, ret | BMCR_RESET); Hmm, that would mean in your case some set bit needs to be preserved. Usually that's not needed. Could you please check which value is read from MII_BMCR? >         if (ret < 0) >                 return ret; > > > > > > > >