diff for duplicates of <86r2oubho3.wl-marc.zyngier@arm.com>
diff --git a/a/1.txt b/N1/1.txt
index 8546a10..6f8a30f 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -14,9 +14,9 @@ Christoffer Dall wrote:
> > >> "When the PE acknowledges an SGI, a PPI, or an SPI at the CPU
> > >> interface, the IRI changes the status of the interrupt to active
> > >> and pending if:
-> > >> • It is an edge-triggered interrupt, and another edge has been
+> > >> ? It is an edge-triggered interrupt, and another edge has been
> > >> detected since the interrupt was acknowledged.
-> > >> • It is a level-sensitive interrupt, and the level has not been
+> > >> ? It is a level-sensitive interrupt, and the level has not been
> > >> deasserted since the interrupt was acknowledged."
> > >>
> > >> GIC v2 specification IHI0048B.b has similar description on page
diff --git a/a/content_digest b/N1/content_digest
index 7a98bbd..a2986f9 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -11,27 +11,16 @@
"ref\00020180308161900.GC1917\@lvm\0"
]
[
- "From\0Marc Zyngier <marc.zyngier\@arm.com>\0"
+ "From\0marc.zyngier\@arm.com (Marc Zyngier)\0"
]
[
- "Subject\0Re: [RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
+ "Subject\0[RFC PATCH] KVM: arm/arm64: vgic: change condition for level interrupt resampling\0"
]
[
"Date\0Thu, 08 Mar 2018 17:28:44 +0000\0"
]
[
- "To\0Christoffer Dall <cdall\@kernel.org>\0"
-]
-[
- "Cc\0Shunyong Yang <shunyong.yang\@hxt-semitech.com>",
- " ard.biesheuvel\@linaro.org",
- " will.deacon\@arm.com",
- " eric.auger\@redhat.com",
- " david.daney\@cavium.com",
- " linux-arm-kernel\@lists.infradead.org",
- " kvmarm\@lists.cs.columbia.edu",
- " linux-kernel\@vger.kernel.org",
- " Joey Zheng <yu.zheng\@hxt-semitech.com>\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -56,9 +45,9 @@
"> > >> \"When the PE acknowledges an SGI, a PPI, or an SPI at the CPU\n",
"> > >> interface, the IRI changes the status of the interrupt to active\n",
"> > >> and pending if:\n",
- "> > >> \342\200\242 It is an edge-triggered interrupt, and another edge has been\n",
+ "> > >> ? It is an edge-triggered interrupt, and another edge has been\n",
"> > >> detected since the interrupt was acknowledged.\n",
- "> > >> \342\200\242 It is a level-sensitive interrupt, and the level has not been\n",
+ "> > >> ? It is a level-sensitive interrupt, and the level has not been\n",
"> > >> deasserted since the interrupt was acknowledged.\"\n",
"> > >>\n",
"> > >> GIC v2 specification IHI0048B.b has similar description on page\n",
@@ -284,4 +273,4 @@
"Jazz is not dead, it just smell funny."
]
-bba8b161a11935260fe75a82d16bb8803879b30348e394b446f330e80e8859b7
+a56b7fc69da75d7d9132167cc6510fb16239ee2a47e837617ad735b41b1065c6
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