All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@intel.com>
To: Vandita Kulkarni <vandita.kulkarni@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP
Date: Thu, 08 Jul 2021 16:13:30 +0300	[thread overview]
Message-ID: <87mtqx54p1.fsf@intel.com> (raw)
In-Reply-To: <87sg0p54w1.fsf@intel.com>

On Thu, 08 Jul 2021, Jani Nikula <jani.nikula@intel.com> wrote:
> On Thu, 08 Jul 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
>> Set DSC BPP to the value forced through
>> debugfs. It can go from bpc to bpp-1.
>>
>> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 5b52beaddada..3e50cdd7e448 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1240,6 +1240,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>>  	pipe_config->port_clock = intel_dp->common_rates[limits->max_clock];
>>  	pipe_config->lane_count = limits->max_lane_count;
>>  
>> +	if (intel_dp->force_dsc_en) {

Oh, this should check for intel_dp->force_dsc_bpp. We don't want to
always force the bpp when we force dsc enable.

>> +		/* As of today we support DSC for only RGB */
>> +		if (intel_dp->force_dsc_bpp >= 8 &&
>> +		    intel_dp->force_dsc_bpp < pipe_bpp) {
>> +			drm_dbg_kms(&dev_priv->drm,
>> +				    "DSC BPP forced to %d",
>> +				    intel_dp->force_dsc_bpp);
>> +			pipe_config->dsc.compressed_bpp =
>> +						intel_dp->force_dsc_bpp;
>> +		} else {
>> +			drm_dbg_kms(&dev_priv->drm,
>> +				    "Invalid DSC BPP %d",
>> +				    intel_dp->force_dsc_bpp);
>> +			return -EINVAL;
>
> I'd just let it use the normal compressed_bpp, with the debug message,
> instead of returning -EINVAL.
>
>> +		}
>> +	}
>> +
>
> This should be *after* the below blocks, because otherwise
> compressed_bpp will be overridden by the normal case, not by the force
> case!
>
> BR,
> Jani.
>
>>  	if (intel_dp_is_edp(intel_dp)) {
>>  		pipe_config->dsc.compressed_bpp =
>>  			min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-08 13:13 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08 10:25 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni
2021-07-08 10:25 ` [Intel-gfx] [v7 1/3] drm/i915/display: Add write permissions for fec support Vandita Kulkarni
2021-07-08 13:05   ` Jani Nikula
2021-07-08 10:25 ` [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable Vandita Kulkarni
2021-07-08 13:10   ` Jani Nikula
2021-07-08 13:13     ` Jani Nikula
2021-07-08 10:25 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni
2021-07-08 13:09   ` Jani Nikula
2021-07-08 13:13     ` Jani Nikula [this message]
2021-07-08 13:24       ` Kulkarni, Vandita
2021-07-08 16:23         ` Jani Nikula
2021-07-08 16:40           ` Kulkarni, Vandita
2021-07-08 14:01   ` [Intel-gfx] [v2] " Vandita Kulkarni
2021-07-14  9:57     ` Sharma, Swati2
2021-07-08 10:28 ` [Intel-gfx] [v7 0/3] Set BPP in the kernel Kulkarni, Vandita
2021-07-08 14:09   ` Kulkarni, Vandita
2021-07-08 21:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Set BPP in the kernel (rev2) Patchwork
2021-07-08 22:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-09 11:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-16 11:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Set BPP in the kernel (rev4) Patchwork
2021-07-16 11:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-16 12:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-16 14:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-19  9:50 [Intel-gfx] [v7 0/3] Set BPP in the kernel Vandita Kulkarni
2021-07-19  9:50 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni
2021-07-20  6:49 [Intel-gfx] [v7 0/3] Enable setting custom DSC BPP Vandita Kulkarni
2021-07-20  6:49 ` [Intel-gfx] [v7 3/3] drm/i915/display/dsc: Force dsc BPP Vandita Kulkarni

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87mtqx54p1.fsf@intel.com \
    --to=jani.nikula@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=vandita.kulkarni@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.