From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9623C07E96 for ; Thu, 8 Jul 2021 13:10:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7C4E861464 for ; Thu, 8 Jul 2021 13:10:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7C4E861464 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0BF7C6E8BE; Thu, 8 Jul 2021 13:10:41 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 899656E8BE for ; Thu, 8 Jul 2021 13:10:39 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10038"; a="209464488" X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="209464488" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2021 06:10:38 -0700 X-IronPort-AV: E=Sophos;i="5.84,222,1620716400"; d="scan'208";a="498420973" Received: from victorge-mobl1.ccr.corp.intel.com (HELO localhost) ([10.252.44.91]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2021 06:10:35 -0700 From: Jani Nikula To: Vandita Kulkarni , intel-gfx@lists.freedesktop.org In-Reply-To: <20210708102549.27821-3-vandita.kulkarni@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210708102549.27821-1-vandita.kulkarni@intel.com> <20210708102549.27821-3-vandita.kulkarni@intel.com> Date: Thu, 08 Jul 2021 16:10:32 +0300 Message-ID: <87pmvt54tz.fsf@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [v7 2/3] drm/i915/display/dsc: Add Per connector debugfs node for DSC BPP enable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 08 Jul 2021, Vandita Kulkarni wrote: > From: Patnana Venkata Sai > > [What]: > This patch creates a per connector debugfs node to expose > the Input and Compressed BPP. > > The same node can be used from userspace to force > DSC to a certain BPP(all accepted values). > > [Why]: > Useful to verify all supported/requested compression bpp's > through IGT > > v2: Remove unnecessary logic (Jani) > v3: Drop pipe bpp in debugfs node (Vandita) > v4: Minor cleanups (Vandita) > v5: Fix NULL pointer dereference > v6: Fix dim tool checkpatch errors > Release the lock before return (Vandita) > v7: Rename to file to dsc_bpp, remove unwanted > dsc bpp range check from v6, permissions (Jani) > > Cc: Vandita Kulkarni > Cc: Navare Manasi D > Cc: Jani Nikula > Signed-off-by: Anusha Srivatsa > Signed-off-by: Patnana Venkata Sai > Signed-off-by: Vandita Kulkarni If this works, I think it's good enough for now. I think there's more overall cleanup to be done in the file, but should not block this one. BR, Jani. > --- > .../drm/i915/display/intel_display_debugfs.c | 76 ++++++++++++++++++- > .../drm/i915/display/intel_display_types.h | 1 + > 2 files changed, 76 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > index 942c4419e0cb..351ada944b1e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c > @@ -2389,6 +2389,73 @@ static const struct file_operations i915_dsc_fec_support_fops = { > .write = i915_dsc_fec_support_write > }; > > +static int i915_dsc_bpp_show(struct seq_file *m, void *data) > +{ > + struct drm_connector *connector = m->private; > + struct drm_device *dev = connector->dev; > + struct drm_crtc *crtc; > + struct intel_crtc_state *crtc_state; > + struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); > + int ret; > + > + if (!encoder) > + return -ENODEV; > + > + ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); > + if (ret) > + return ret; > + > + crtc = connector->state->crtc; > + if (connector->status != connector_status_connected || !crtc) { > + ret = -ENODEV; > + goto out; > + } > + > + crtc_state = to_intel_crtc_state(crtc->state); > + seq_printf(m, "Compressed_BPP: %d\n", crtc_state->dsc.compressed_bpp); > + > +out: drm_modeset_unlock(&dev->mode_config.connection_mutex); > + > + return ret; > +} > + > +static ssize_t i915_dsc_bpp_write(struct file *file, > + const char __user *ubuf, > + size_t len, loff_t *offp) > +{ > + struct drm_connector *connector = > + ((struct seq_file *)file->private_data)->private; > + struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + int dsc_bpp = 0; > + int ret; > + > + ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpp); > + if (ret < 0) > + return ret; > + > + intel_dp->force_dsc_bpp = dsc_bpp; > + *offp += len; > + > + return len; > +} > + > +static int i915_dsc_bpp_open(struct inode *inode, > + struct file *file) > +{ > + return single_open(file, i915_dsc_bpp_show, > + inode->i_private); > +} > + > +static const struct file_operations i915_dsc_bpp_fops = { > + .owner = THIS_MODULE, > + .open = i915_dsc_bpp_open, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > + .write = i915_dsc_bpp_write > +}; > + > /** > * intel_connector_debugfs_add - add i915 specific connector debugfs files > * @connector: pointer to a registered drm_connector > @@ -2427,10 +2494,17 @@ int intel_connector_debugfs_add(struct drm_connector *connector) > connector, &i915_hdcp_sink_capability_fops); > } > > - if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && !to_intel_connector(connector)->mst_port) || connector->connector_type == DRM_MODE_CONNECTOR_eDP)) > + if ((DISPLAY_VER(dev_priv) >= 11 || IS_CANNONLAKE(dev_priv)) && > + ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && > + !to_intel_connector(connector)->mst_port) || > + connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { > debugfs_create_file("i915_dsc_fec_support", 0644, root, > connector, &i915_dsc_fec_support_fops); > > + debugfs_create_file("i915_dsc_bpp", 0644, root, > + connector, &i915_dsc_bpp_fops); > + } > + > /* Legacy panels doesn't lpsp on any platform */ > if ((DISPLAY_VER(dev_priv) >= 9 || IS_HASWELL(dev_priv) || > IS_BROADWELL(dev_priv)) && > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index d94f361b548b..19d8d3eefbc2 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1612,6 +1612,7 @@ struct intel_dp { > > /* Display stream compression testing */ > bool force_dsc_en; > + int force_dsc_bpp; > > bool hobl_failed; > bool hobl_active; -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx