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From: Thomas Gleixner <tglx@linutronix.de>
To: "Singh\, Balbir" <sblbir@amazon.com>,
	"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "keescook\@chromium.org" <keescook@chromium.org>,
	"thomas.lendacky\@amd.com" <thomas.lendacky@amd.com>,
	"tony.luck\@intel.com" <tony.luck@intel.com>,
	"benh\@kernel.crashing.org" <benh@kernel.crashing.org>,
	"jpoimboe\@redhat.com" <jpoimboe@redhat.com>,
	"x86\@kernel.org" <x86@kernel.org>,
	"dave.hansen\@intel.com" <dave.hansen@intel.com>
Subject: Re:  [PATCH v6 5/6] Optionally flush L1D on context switch
Date: Thu, 14 May 2020 13:33:02 +0200	[thread overview]
Message-ID: <87pnb6zr81.fsf@nanos.tec.linutronix.de> (raw)
In-Reply-To: <c51109f10f6572f5cf60d2693f84ff8e65c7804a.camel@amazon.com>

Balbir,

"Singh, Balbir" <sblbir@amazon.com> writes:
> On Wed, 2020-05-13 at 18:16 +0200, Thomas Gleixner wrote:
>> Balbir Singh <sblbir@amazon.com> writes:
>> But looking at this deeper (yes I should have noticed earlier):
>> 
>>     Why do we need yet another PRCTL?
>> 
>> We already have PR_SET_SPECULATION_CTRL/PR_GET_SPECULATION_CTRL. That
>> L1D flush thingy fits into this category, right?
>
> It does, I thought about it for a while when I was changing the code and
> left it aside because, looking at the definition
>
> 1    PR_SPEC_ENABLE         The speculation feature is enabled,
> mitigation is disabled.
> 2    PR_SPEC_DISABLE        The speculation feature is disabled,
> mitigation is enabled.
>
> With L1D flush, there is no overriding of the feature as such (as in
> enable when the mitigation is disabled and vice-versa). I am happy to
> reconsider my initial thought though.

L1D is always enabled as L1D will be a source of trouble forever :)

Thanks,

        tglx

  reply	other threads:[~2020-05-14 11:33 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-10  1:47 [PATCH v6 0/6] Optionally flush L1D on context switch Balbir Singh
2020-05-10  1:47 ` [PATCH v6 1/6] arch/x86/kvm: Refactor l1d flush lifecycle management Balbir Singh
2020-05-13 13:35   ` Thomas Gleixner
2020-05-14  8:23     ` Singh, Balbir
2020-05-13 13:53   ` Thomas Gleixner
2020-05-14  8:25     ` Singh, Balbir
2020-05-22  9:32   ` [tip: x86/mm] x86/kvm: Refactor L1D flush page management tip-bot2 for Balbir Singh
2020-05-10  1:47 ` [PATCH v6 2/6] arch/x86/kvm: Refactor tlbflush and l1d flush Balbir Singh
2020-05-22  9:32   ` [tip: x86/mm] x86/kvm: Refactor L1D flush operations tip-bot2 for Balbir Singh
2020-05-10  1:48 ` [PATCH v6 3/6] arch/x86/mm: Refactor cond_ibpb() to support other use cases Balbir Singh
2020-05-13 14:16   ` Thomas Gleixner
2020-05-22  9:32   ` [tip: x86/mm] x86/mm: " tip-bot2 for Balbir Singh
2020-09-16 13:11   ` [tip: x86/pti] " tip-bot2 for Balbir Singh
2020-05-10  1:48 ` [PATCH v6 4/6] arch/x86/kvm: Refactor L1D flushing Balbir Singh
2020-05-22  9:32   ` [tip: x86/mm] x86/kvm: " tip-bot2 for Balbir Singh
2020-05-10  1:48 ` [PATCH v6 5/6] Optionally flush L1D on context switch Balbir Singh
2020-05-13 15:04   ` Thomas Gleixner
2020-05-14  8:23     ` Singh, Balbir
2020-05-13 15:27   ` Thomas Gleixner
2020-05-14 21:28     ` Singh, Balbir
2020-05-13 16:16   ` Thomas Gleixner
2020-05-14  7:43     ` Singh, Balbir
2020-05-14 11:33       ` Thomas Gleixner [this message]
2020-05-10  1:48 ` [PATCH v6 6/6] Documentation: Add L1D flushing Documentation Balbir Singh
2020-05-13 13:33   ` Thomas Gleixner
2020-05-14  1:12     ` Singh, Balbir

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