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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Alvise Rigo <a.rigo@virtualopensystems.com>
Cc: mttcg@listserver.greensocs.com, claudio.fontana@huawei.com,
	qemu-devel@nongnu.org, pbonzini@redhat.com,
	jani.kokkonen@huawei.com, tech@virtualopensystems.com,
	rth@twiddle.net
Subject: Re: [Qemu-devel] [RFC v6 12/14] softmmu: Simplify helper_*_st_name, wrap RAM code
Date: Thu, 17 Dec 2015 16:52:52 +0000	[thread overview]
Message-ID: <87poy5f257.fsf@linaro.org> (raw)
In-Reply-To: <1450082498-27109-13-git-send-email-a.rigo@virtualopensystems.com>


Alvise Rigo <a.rigo@virtualopensystems.com> writes:

> Attempting to simplify the helper_*_st_name, wrap the code relative to a
> RAM access into an inline function.

This commit breaks a default x86_64-softmmu build:

  CC    x86_64-softmmu/../hw/audio/pcspk.o
In file included from /home/alex/lsrc/qemu/qemu.git/cputlb.c:527:0:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_ret_stb_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:503:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:503:13: note: each undeclared identifier is reported only once for each function it appears in
In file included from /home/alex/lsrc/qemu/qemu.git/cputlb.c:530:0:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_le_stw_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:503:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_be_stw_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:651:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
In file included from /home/alex/lsrc/qemu/qemu.git/cputlb.c:533:0:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_le_stl_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:503:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_be_stl_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:651:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
In file included from /home/alex/lsrc/qemu/qemu.git/cputlb.c:536:0:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_le_stq_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:503:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h: In function ‘helper_be_stq_mmu’:
/home/alex/lsrc/qemu/qemu.git/softmmu_template.h:651:13: error: ‘haddr’ undeclared (first use in this function)
             haddr = addr + env->tlb_table[mmu_idx][index].addend;
             ^
make[1]: *** [cputlb.o] Error 1
make[1]: *** Waiting for unfinished jobs....
  CC    x86_64-softmmu/../hw/block/fdc.o
make: *** [subdir-x86_64-softmmu] Error 2

ERROR: commit 3a371deaf11ce944127a00eadbc7e811b6798de1 failed to build!
commit 3a371deaf11ce944127a00eadbc7e811b6798de1
Author: Alvise Rigo <a.rigo@virtualopensystems.com>
Date:   Thu Dec 10 17:26:54 2015 +0100

    softmmu: Simplify helper_*_st_name, wrap RAM code

Found while checking with Jeff's compile-check script:

https://github.com/codyprime/git-scripts

git compile-check -r c3626ca7df027dabf0568284360a23faf18f0884..HEAD

>
> Suggested-by: Jani Kokkonen <jani.kokkonen@huawei.com>
> Suggested-by: Claudio Fontana <claudio.fontana@huawei.com>
> Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>
> ---
>  softmmu_template.h | 110 +++++++++++++++++++++++++++++++++--------------------
>  1 file changed, 68 insertions(+), 42 deletions(-)
>
> diff --git a/softmmu_template.h b/softmmu_template.h
> index 2ebf527..262c95f 100644
> --- a/softmmu_template.h
> +++ b/softmmu_template.h
> @@ -416,13 +416,46 @@ static inline void glue(helper_le_st_name, _do_mmio_access)(CPUArchState *env,
>      glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
>  }
>
> +static inline void glue(helper_le_st_name, _do_ram_access)(CPUArchState *env,
> +                                                           DATA_TYPE val,
> +                                                           target_ulong addr,
> +                                                           TCGMemOpIdx oi,
> +                                                           unsigned mmu_idx,
> +                                                           int index,
> +                                                           uintptr_t retaddr)
> +{
> +    uintptr_t haddr;
> +
> +    /* Handle slow unaligned access (it spans two pages or IO).  */
> +    if (DATA_SIZE > 1
> +        && unlikely((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1
> +                     >= TARGET_PAGE_SIZE)) {
> +        glue(helper_le_st_name, _do_unl_access)(env, val, addr, oi, mmu_idx,
> +                                                retaddr);
> +        return;
> +    }
> +
> +    /* Handle aligned access or unaligned access in the same page.  */
> +    if ((addr & (DATA_SIZE - 1)) != 0
> +        && (get_memop(oi) & MO_AMASK) == MO_ALIGN) {
> +        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,
> +                             mmu_idx, retaddr);
> +    }
> +
> +    haddr = addr + env->tlb_table[mmu_idx][index].addend;
> +#if DATA_SIZE == 1
> +    glue(glue(st, SUFFIX), _p)((uint8_t *)haddr, val);
> +#else
> +    glue(glue(st, SUFFIX), _le_p)((uint8_t *)haddr, val);
> +#endif
> +}
> +
>  void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
>                         TCGMemOpIdx oi, uintptr_t retaddr)
>  {
>      unsigned mmu_idx = get_mmuidx(oi);
>      int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
>      target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> -    uintptr_t haddr;
>
>      /* Adjust the given return address.  */
>      retaddr -= GETPC_ADJ;
> @@ -484,28 +517,8 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
>          }
>      }
>
> -    /* Handle slow unaligned access (it spans two pages or IO).  */
> -    if (DATA_SIZE > 1
> -        && unlikely((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1
> -                     >= TARGET_PAGE_SIZE)) {
> -        glue(helper_le_st_name, _do_unl_access)(env, val, addr, oi, mmu_idx,
> -                                                retaddr);
> -        return;
> -    }
> -
> -    /* Handle aligned access or unaligned access in the same page.  */
> -    if ((addr & (DATA_SIZE - 1)) != 0
> -        && (get_memop(oi) & MO_AMASK) == MO_ALIGN) {
> -        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,
> -                             mmu_idx, retaddr);
> -    }
> -
> -    haddr = addr + env->tlb_table[mmu_idx][index].addend;
> -#if DATA_SIZE == 1
> -    glue(glue(st, SUFFIX), _p)((uint8_t *)haddr, val);
> -#else
> -    glue(glue(st, SUFFIX), _le_p)((uint8_t *)haddr, val);
> -#endif
> +    glue(helper_le_st_name, _do_ram_access)(env, val, addr, oi, mmu_idx, index,
> +                                            retaddr);
>  }
>
>  #if DATA_SIZE > 1
> @@ -555,13 +568,42 @@ static inline void glue(helper_be_st_name, _do_mmio_access)(CPUArchState *env,
>      glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
>  }
>
> +static inline void glue(helper_be_st_name, _do_ram_access)(CPUArchState *env,
> +                                                           DATA_TYPE val,
> +                                                           target_ulong addr,
> +                                                           TCGMemOpIdx oi,
> +                                                           unsigned mmu_idx,
> +                                                           int index,
> +                                                           uintptr_t retaddr)
> +{
> +    uintptr_t haddr;
> +
> +    /* Handle slow unaligned access (it spans two pages or IO).  */
> +    if (DATA_SIZE > 1
> +        && unlikely((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1
> +                     >= TARGET_PAGE_SIZE)) {
> +        glue(helper_be_st_name, _do_unl_access)(env, val, addr, oi, mmu_idx,
> +                                                retaddr);
> +        return;
> +    }
> +
> +    /* Handle aligned access or unaligned access in the same page.  */
> +    if ((addr & (DATA_SIZE - 1)) != 0
> +        && (get_memop(oi) & MO_AMASK) == MO_ALIGN) {
> +        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,
> +                             mmu_idx, retaddr);
> +    }
> +
> +    haddr = addr + env->tlb_table[mmu_idx][index].addend;
> +    glue(glue(st, SUFFIX), _be_p)((uint8_t *)haddr, val);
> +}
> +
>  void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
>                         TCGMemOpIdx oi, uintptr_t retaddr)
>  {
>      unsigned mmu_idx = get_mmuidx(oi);
>      int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
>      target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> -    uintptr_t haddr;
>
>      /* Adjust the given return address.  */
>      retaddr -= GETPC_ADJ;
> @@ -623,24 +665,8 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
>          }
>      }
>
> -    /* Handle slow unaligned access (it spans two pages or IO).  */
> -    if (DATA_SIZE > 1
> -        && unlikely((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1
> -                     >= TARGET_PAGE_SIZE)) {
> -        glue(helper_be_st_name, _do_unl_access)(env, val, addr, oi, mmu_idx,
> -                                                retaddr);
> -        return;
> -    }
> -
> -    /* Handle aligned access or unaligned access in the same page.  */
> -    if ((addr & (DATA_SIZE - 1)) != 0
> -        && (get_memop(oi) & MO_AMASK) == MO_ALIGN) {
> -        cpu_unaligned_access(ENV_GET_CPU(env), addr, MMU_DATA_STORE,
> -                             mmu_idx, retaddr);
> -    }
> -
> -    haddr = addr + env->tlb_table[mmu_idx][index].addend;
> -    glue(glue(st, SUFFIX), _be_p)((uint8_t *)haddr, val);
> +    glue(helper_be_st_name, _do_ram_access)(env, val, addr, oi, mmu_idx, index,
> +                                            retaddr);
>  }
>  #endif /* DATA_SIZE > 1 */


--
Alex Bennée

  reply	other threads:[~2015-12-17 16:53 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-14  8:41 [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation Alvise Rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 01/14] exec.c: Add new exclusive bitmap to ram_list Alvise Rigo
2015-12-18 13:18   ` Alex Bennée
2015-12-18 13:47     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 02/14] softmmu: Add new TLB_EXCL flag Alvise Rigo
2016-01-05 16:10   ` Alex Bennée
2016-01-05 17:27     ` alvise rigo
2016-01-05 18:39       ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 03/14] Add CPUClass hook to set exclusive range Alvise Rigo
2016-01-05 16:42   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 04/14] softmmu: Add helpers for a new slowpath Alvise Rigo
2016-01-06 15:16   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 05/14] tcg: Create new runtime helpers for excl accesses Alvise Rigo
2015-12-14  9:40   ` Paolo Bonzini
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled Alvise Rigo
2015-12-14  9:38   ` Paolo Bonzini
2015-12-14  9:39     ` Paolo Bonzini
2015-12-14 10:14   ` Laurent Vivier
2015-12-15 14:23     ` alvise rigo
2015-12-15 14:31       ` Paolo Bonzini
2015-12-15 15:18         ` Laurent Vivier
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 07/14] target-arm: translate: Use ld/st excl for atomic insns Alvise Rigo
2016-01-06 17:11   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 08/14] target-arm: Add atomic_clear helper for CLREX insn Alvise Rigo
2016-01-06 17:13   ` Alex Bennée
2016-01-06 17:27     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses Alvise Rigo
2015-12-14  9:35   ` Paolo Bonzini
2015-12-15 14:26     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 10/14] softmmu: Simplify helper_*_st_name, wrap unaligned code Alvise Rigo
2016-01-07 14:46   ` Alex Bennée
2016-01-07 15:09     ` alvise rigo
2016-01-07 16:35       ` Alex Bennée
2016-01-07 16:54         ` alvise rigo
2016-01-07 17:36           ` Alex Bennée
2016-01-08 11:19   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code Alvise Rigo
2016-01-11  9:54   ` Alex Bennée
2016-01-11 10:19     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 12/14] softmmu: Simplify helper_*_st_name, wrap RAM code Alvise Rigo
2015-12-17 16:52   ` Alex Bennée [this message]
2015-12-17 17:13     ` alvise rigo
2015-12-17 20:20       ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 13/14] softmmu: Include MMIO/invalid exclusive accesses Alvise Rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 14/14] softmmu: Protect MMIO exclusive range Alvise Rigo
2015-12-14  9:33 ` [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation Paolo Bonzini
2015-12-14 10:04   ` alvise rigo
2015-12-14 10:17     ` Paolo Bonzini
2015-12-15 13:59       ` alvise rigo
2015-12-15 14:18         ` Paolo Bonzini
2015-12-15 14:22           ` alvise rigo
2015-12-14 22:09 ` Andreas Tobler
2015-12-15  8:16   ` alvise rigo
2015-12-17 16:06 ` Alex Bennée
2015-12-17 16:16   ` alvise rigo
2016-01-06 18:00 ` Andrew Baumann
2016-01-07 10:21   ` alvise rigo
2016-01-07 10:22     ` Peter Maydell
2016-01-07 10:49       ` alvise rigo
2016-01-07 11:16         ` Peter Maydell

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