diff for duplicates of <90493b09df41a9c1dd0bf315e81d03b4212384f9.1536828567.git.horms+renesas@verge.net.au>
diff --git a/a/1.txt b/N1/1.txt
index f2886f4..301fa13 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -66,7 +66,7 @@ index 000000000000..8e63e9aee456
+ #address-cells = <1>;
+ #size-cells = <0>;
+
-+ a57_0: cpu@0 {
++ a57_0: cpu at 0 {
+ compatible = "arm,cortex-a57", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
@@ -76,7 +76,7 @@ index 000000000000..8e63e9aee456
+ clocks =<&cpg CPG_CORE 0>;
+ };
+
-+ a57_1: cpu@1 {
++ a57_1: cpu at 1 {
+ compatible = "arm,cortex-a57", "arm,armv8";
+ reg = <0x1>;
+ device_type = "cpu";
@@ -141,7 +141,7 @@ index 000000000000..8e63e9aee456
+ #size-cells = <2>;
+ ranges;
+
-+ cpg: clock-controller@e6150000 {
++ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a774a1-cpg-mssr";
+ reg = <0 0xe6150000 0 0x0bb0>;
+ clocks = <&extal_clk>, <&extalr_clk>;
@@ -151,18 +151,18 @@ index 000000000000..8e63e9aee456
+ #reset-cells = <1>;
+ };
+
-+ rst: reset-controller@e6160000 {
++ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a774a1-rst";
+ reg = <0 0xe6160000 0 0x018c>;
+ };
+
-+ sysc: system-controller@e6180000 {
++ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a774a1-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
-+ gic: interrupt-controller@f1010000 {
++ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
@@ -179,7 +179,7 @@ index 000000000000..8e63e9aee456
+ resets = <&cpg 408>;
+ };
+
-+ prr: chipid@fff00044 {
++ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
diff --git a/a/content_digest b/N1/content_digest
index c76716e..3f2a310 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,7 +2,7 @@
"ref\0cover.1536828567.git.horms+renesas\@verge.net.au\0"
]
[
- "From\0Simon Horman <horms+renesas\@verge.net.au>\0"
+ "From\0horms+renesas\@verge.net.au (Simon Horman)\0"
]
[
"Subject\0[PATCH 13/58] arm64: dts: renesas: Initial r8a774a1 SoC device tree\0"
@@ -11,13 +11,7 @@
"Date\0Thu, 13 Sep 2018 11:09:08 +0200\0"
]
[
- "To\0linux-renesas-soc\@vger.kernel.org\0"
-]
-[
- "Cc\0linux-arm-kernel\@lists.infradead.org",
- " Magnus Damm <magnus.damm\@gmail.com>",
- " Biju Das <biju.das\@bp.renesas.com>",
- " Simon Horman <horms+renesas\@verge.net.au>\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -94,7 +88,7 @@
"+\t\t#address-cells = <1>;\n",
"+\t\t#size-cells = <0>;\n",
"+\n",
- "+\t\ta57_0: cpu\@0 {\n",
+ "+\t\ta57_0: cpu at 0 {\n",
"+\t\t\tcompatible = \"arm,cortex-a57\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0>;\n",
"+\t\t\tdevice_type = \"cpu\";\n",
@@ -104,7 +98,7 @@
"+\t\t\tclocks =<&cpg CPG_CORE 0>;\n",
"+\t\t};\n",
"+\n",
- "+\t\ta57_1: cpu\@1 {\n",
+ "+\t\ta57_1: cpu at 1 {\n",
"+\t\t\tcompatible = \"arm,cortex-a57\", \"arm,armv8\";\n",
"+\t\t\treg = <0x1>;\n",
"+\t\t\tdevice_type = \"cpu\";\n",
@@ -169,7 +163,7 @@
"+\t\t#size-cells = <2>;\n",
"+\t\tranges;\n",
"+\n",
- "+\t\tcpg: clock-controller\@e6150000 {\n",
+ "+\t\tcpg: clock-controller at e6150000 {\n",
"+\t\t\tcompatible = \"renesas,r8a774a1-cpg-mssr\";\n",
"+\t\t\treg = <0 0xe6150000 0 0x0bb0>;\n",
"+\t\t\tclocks = <&extal_clk>, <&extalr_clk>;\n",
@@ -179,18 +173,18 @@
"+\t\t\t#reset-cells = <1>;\n",
"+\t\t};\n",
"+\n",
- "+\t\trst: reset-controller\@e6160000 {\n",
+ "+\t\trst: reset-controller at e6160000 {\n",
"+\t\t\tcompatible = \"renesas,r8a774a1-rst\";\n",
"+\t\t\treg = <0 0xe6160000 0 0x018c>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tsysc: system-controller\@e6180000 {\n",
+ "+\t\tsysc: system-controller at e6180000 {\n",
"+\t\t\tcompatible = \"renesas,r8a774a1-sysc\";\n",
"+\t\t\treg = <0 0xe6180000 0 0x0400>;\n",
"+\t\t\t#power-domain-cells = <1>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tgic: interrupt-controller\@f1010000 {\n",
+ "+\t\tgic: interrupt-controller at f1010000 {\n",
"+\t\t\tcompatible = \"arm,gic-400\";\n",
"+\t\t\t#interrupt-cells = <3>;\n",
"+\t\t\t#address-cells = <0>;\n",
@@ -207,7 +201,7 @@
"+\t\t\tresets = <&cpg 408>;\n",
"+\t\t};\n",
"+\n",
- "+\t\tprr: chipid\@fff00044 {\n",
+ "+\t\tprr: chipid at fff00044 {\n",
"+\t\t\tcompatible = \"renesas,prr\";\n",
"+\t\t\treg = <0 0xfff00044 0 4>;\n",
"+\t\t};\n",
@@ -238,4 +232,4 @@
"2.11.0"
]
-63fb13a979b82f18649fd8b6895fd7687532a5dd9babc017c58c747d9be3eb55
+6121d1201687551556aa102c3df3b4c5373d2293c19e795884e2fda283223c9e
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