Re: [PATCH v6 06/13] ARC: hardware floating point support

[Vineet Gupta <Vineet.Gupta1@synopsys.com>]

On 5/29/20 7:12 AM, Adhemerval Zanella wrote:
> 
> 
> On 22/04/2020 22:41, Vineet Gupta via Libc-alpha wrote:
>> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

>> diff --git a/sysdeps/arc/fpu/e_sqrt.c b/sysdeps/arc/fpu/e_sqrt.c
>> +
>> +#include <math_private.h>
>> +#include <libm-alias-finite.h>
>> +
>> +double
>> +__ieee754_sqrt (double d)
>> +{
>> +  return __builtin_sqrt (d);
>> +}
>> +libm_alias_finite (__ieee754_sqrt, __sqrt)
> 
> I think it is better to extend to math-use-builtins.h for cover 
> e_sqrt{f} so we can also adapt to other architecutes.

Good idea.

Side question: what do s_ / e_ prefixes mean?
The suffix is clear s_roundf (float), s_round (double), s_roundl (128).

>> diff --git a/sysdeps/arc/fpu/e_sqrtf.c b/sysdeps/arc/fpu/e_sqrtf.c
>> new file mode 100644
>> index 000000000000..13008a4f45d6
>> --- /dev/null
>> +++ b/sysdeps/arc/fpu/e_sqrtf.c

>> +#include <math_private.h>
>> +#include <libm-alias-finite.h>
>> +
>> +float
>> +__ieee754_sqrtf (float s)
>> +{
>> +  return __builtin_sqrtf (s);
>> +}
>> +libm_alias_finite (__ieee754_sqrtf, __sqrtf)
> 
> Same as before.

OK.

>> diff --git a/sysdeps/arc/fpu/s_fma.c b/sysdeps/arc/fpu/s_fma.c

>> +
>> +#include <math.h>
>> +#include <libm-alias-double.h>
>> +
>> +double
>> +__fma (double x, double y, double z)
>> +{
>> +  return __builtin_fma (x, y, z);
>> +}
>> +
>> +libm_alias_double (__fma, fma)
> 
> Same as for sqrt{f}.

OK.


>> diff --git a/sysdeps/arc/fpu/s_fmaf.c b/sysdeps/arc/fpu/s_fmaf.c
>> new file mode 100644
>> index 000000000000..544f32e27aec
>> --- /dev/null
>> +++ b/sysdeps/arc/fpu/s_fmaf.c
>> @@ -0,0 +1,28 @@
>> +/* Copyright (C) 2011-2020 Free Software Foundation, Inc.
>> +
>> +   This file is part of the GNU C Library.
>> +
>> +   The GNU C Library is free software; you can redistribute it and/or
>> +   modify it under the terms of the GNU Lesser General Public License as
>> +   published by the Free Software Foundation; either version 2.1 of the
>> +   License, or (at your option) any later version.
>> +
>> +   The GNU C Library is distributed in the hope that it will be useful,
>> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   Lesser General Public License for more details.
>> +
>> +   You should have received a copy of the GNU Lesser General Public
>> +   License along with the GNU C Library; if not, see
>> +   <https://www.gnu.org/licenses/>.  */
>> +
>> +#include <math.h>
>> +#include <libm-alias-float.h>
>> +
>> +float
>> +__fmaf (float x, float y, float z)
>> +{
>> +  return __builtin_fmaf (x, y, z);
>> +}
>> +
>> +libm_alias_float (__fma, fma)
>> diff --git a/sysdeps/arc/fpu_control.h b/sysdeps/arc/fpu_control.h
>> new file mode 100644
>> index 000000000000..121656ff7d8c
>> --- /dev/null
>> +++ b/sysdeps/arc/fpu_control.h
>> @@ -0,0 +1,106 @@
>> +/* FPU control word bits.  ARC version.
>> +   Copyright (C) 2018-2020 Free Software Foundation, Inc.
>> +   This file is part of the GNU C Library.
>> +
>> +   The GNU C Library is free software; you can redistribute it and/or
>> +   modify it under the terms of the GNU Lesser General Public
>> +   License as published by the Free Software Foundation; either
>> +   version 2.1 of the License, or (at your option) any later version.
>> +
>> +   The GNU C Library is distributed in the hope that it will be useful,
>> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
>> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
>> +   Lesser General Public License for more details.
>> +
>> +   You should have received a copy of the GNU Lesser General Public
>> +   License along with the GNU C Library.  If not, see
>> +   <https://www.gnu.org/licenses/>.  */
>> +
>> +#ifndef _FPU_CONTROL_H
>> +#define _FPU_CONTROL_H
>> +
>> +/* ARC FPU control register bits.
>> +
>> +  [  0] -> IVE: Enable invalid operation exception.
>> +           if 0, soft exception: status register IV flag set.
>> +           if 1, hardware exception trap (not supported in Linux yet).
>> +  [  1] -> DZE: Enable division by zero exception.
>> +           if 0, soft exception: status register IV flag set.
>> +           if 1, hardware exception: (not supported in Linux yet).
>> +  [9:8] -> RM: Rounding Mode:
>> +           00 - Rounding toward zero.
>> +           01 - Rounding to nearest (default).
>> +           10 - Rounding (up) toward plus infinity.
>> +           11 - Rounding (down)toward minus infinity.
>> +
>> +   ARC FPU status register bits.
>> +
>> +   [ 0]  -> IV: flag invalid operation.
>> +   [ 1]  -> DZ: flag division by zero.
>> +   [ 2]  -> OV: flag Overflow operation.
>> +   [ 3]  -> UV: flag Underflow operation.
>> +   [ 4]  -> IX: flag Inexact operation.
>> +   [31]  -> FWE: Flag Write Enable.
>> +            If 1, above flags writable explicitly (clearing),
>> +            else IoW and only writable indirectly via bits [12:7].  */
>> +
>> +#include <features.h>
>> +
>> +#if !defined(__ARC_FPU_SP__) &&  !defined(__ARC_FPU_DP__)
>> +
>> +# define _FPU_RESERVED 0xffffffff
>> +# define _FPU_DEFAULT  0x00000000
>> +typedef unsigned int fpu_control_t;
>> +# define _FPU_GETCW(cw) (cw) = 0
>> +# define _FPU_SETCW(cw) (void) (cw)
>> +# define _FPU_GETS(cw) (cw) = 0
>> +# define _FPU_SETS(cw) (void) (cw)
>> +extern fpu_control_t __fpu_control;
>> +
>> +#else
>> +
>> +#define _FPU_RESERVED		0
>> +
>> +/* The fdlibm code requires strict IEEE double precision arithmetic,
>> +   and no interrupts for exceptions, rounding to nearest.
>> +   So only RM set to b'01.  */
>> +# define _FPU_DEFAULT		0x00000100
>> +
>> +/* Actually default needs to have FWE bit as 1 but that is already
>> +   ingrained into _FPU_SETS macro below.  */
>> +#define  _FPU_FPSR_DEFAULT	0x00000000
>> +
>> +#define __FPU_RND_SHIFT		8
>> +#define __FPU_RND_MASK		0x3
>> +
>> +/* Type of the control word.  */
>> +typedef unsigned int fpu_control_t;
>> +
>> +/* Macros for accessing the hardware control word.  */
>> +#  define _FPU_GETCW(cw) __asm__ volatile ("lr %0, [0x300]" : "=r" (cw))
>> +#  define _FPU_SETCW(cw) __asm__ volatile ("sr %0, [0x300]" : : "r" (cw))
>> +
>> +/*  Macros for accessing the hardware status word.
>> +    FWE bit is special as it controls if actual status bits could be wrritten
>> +    explicitly (other than FPU instructions). We handle it here to keep the
>> +    callers agnostic of it:
>> +      - clear it out when reporting status bits
>> +      - always set it when changing status bits.  */
>> +#  define _FPU_GETS(cw)				\
>> +    __asm__ volatile ("lr   %0, [0x301]	\r\n" 	\
>> +                      "bclr %0, %0, 31	\r\n" 	\
>> +                      : "=r" (cw))
>> +
>> +#  define _FPU_SETS(cw)				\
>> +    do {					\
>> +      unsigned int __tmp = 0x80000000 | (cw);	\
>> +      __asm__ volatile ("sr  %0, [0x301] \r\n" 	\
>> +                        : : "r" (__tmp));	\
>> +    } while (0)
>> +
> 
> Although this code follow other architectures, I think it woudl be better
> to move forward a macro that emulates function calls and use proper
> static inline function instead for _FPU_* (as for get-rounding-mode.h).

OK. do you have a preference for names, existing upper case names OK ?
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