From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysrps-0007gS-9p for qemu-devel@nongnu.org; Thu, 14 May 2015 08:02:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ysrpn-0007kC-Fq for qemu-devel@nongnu.org; Thu, 14 May 2015 08:01:56 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:51670) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ysrpm-0007ht-Sy for qemu-devel@nongnu.org; Thu, 14 May 2015 08:01:51 -0400 From: Shlomo Pongratz Date: Thu, 14 May 2015 12:01:22 +0000 Message-ID: References: <00c901d08990$2763c410$762b4c30$@samsung.com> <034301d08c92$dccf6e80$966e4b80$@samsung.com> <03e001d08caf$d7fcd1a0$87f674e0$@samsung.com> , <006901d08d84$ba7f0370$2f7d0a50$@samsung.com> In-Reply-To: <006901d08d84$ba7f0370$2f7d0a50$@samsung.com> Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH v2] Add virt-v3 machine that uses GIC-500 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pavel Fedin , "qemu-devel@nongnu.org" Cc: Peter Maydell , Claudio Fontana , Shannon Zhao , "christoffer.dall@linaro.org" Hi Pavel,=0A= =0A= Please see in-line.=0A= Best regards,=0A= =0A= S.P.=0A= =0A= ________________________________________=0A= From: Pavel Fedin [p.fedin@samsung.com]=0A= Sent: Wednesday, May 13, 2015 4:57 PM=0A= To: Shlomo Pongratz; qemu-devel@nongnu.org=0A= Subject: RE: [Qemu-devel] [PATCH v2] Add virt-v3 machine that uses GIC-500= =0A= =0A= Hello!=0A= =0A= > 1. In fdt_add_timer why you didn't used the 24 bit limit I posed on the i= rqflags? Please=0A= note that=0A= > the argument is 32 bits wide and 8 bits are for flags.=0A= =0A= Simply missed it when checking for differences. Please fix. :) Perhaps it= is the reason=0A= why >=3D24 CPUs fail for you.=0A= =0A= I wonder how it works for you. Do you aware of an alternative way to config= ure the clock irqflags for more then 24 cores, or is it just ignored. Accor= ding to Linux documentation this fdt field sets the clock IRQ affinity.=0A= =0A= My current status is as follows:=0A= With 64 cores there is no printouts what so ever. =0A= With 32 cores the boot usually get stuck after the message "[ 45.719102] = SCSI subsystem initialized"=0A= With 24 cores the system noontimes complete the boot and sometimes get stuc= k like the 32 cores system.=0A= =0A= > 2. In machvirt_init, I used TYPE_AARCH64_CPU while you reverted it to TYP= E_ARM_CPU, I=0A= > assume this is because you want to support cortex-a15. Don't you think It= should be=0A= according=0A= > to the cortex type?=0A= =0A= Yes, i just left it as it was because it already works fine with ARM64. Ac= tually,=0A= TYPE_AARCH64_CPU is a subclass of TYPE_ARM_CPU.=0A= =0A= I see but I guess that I want aarch64_cpu_initfn to be called and not arm_c= pu_initfn.=0A= =0A= > (BTW you removed cortex-a53).=0A= =0A= Yes, because i didn't see how it is different from a57 (or a15). I tried t= o follow=0A= minimal intervention principle.=0A= But perhaps i was wrong because there was real support for a53 added recen= tly:=0A= http://lists.nongnu.org/archive/html/qemu-devel/2015-05/msg01304.html, so f= eel free to=0A= re-add it back.=0A= =0A= I agree with you I think this should wait for the patch you mentioned above= to be integrated.=0A= =0A= BTW, just for interest, have you tried to do anything with KVM support of = vGICv3? I have=0A= some code but it's inherently unstable and lock up for unknown (yet) reason= .=0A= =0A= No, this is because I don't have an ARM64 based server needed for running K= VM for ARM64.=0A= =0A= Kind regards,=0A= Pavel Fedin=0A= Expert Engineer=0A= Samsung Electronics Research center Russia=0A= =0A= =0A=