From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41942) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzWmb-0005mR-A9 for qemu-devel@nongnu.org; Mon, 01 Jun 2015 16:58:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YzWmX-0007nk-7f for qemu-devel@nongnu.org; Mon, 01 Jun 2015 16:58:05 -0400 Received: from blu004-omc1s31.hotmail.com ([65.55.116.42]:62599) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzWmX-0007ne-42 for qemu-devel@nongnu.org; Mon, 01 Jun 2015 16:58:01 -0400 Message-ID: Date: Tue, 2 Jun 2015 04:58:37 +0800 From: Chen Gang MIME-Version: 1.0 References: <5550DEFF.8050204@twiddle.net> In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 09/10 v10] target-tilegx: Generate tcg instructions to execute to _init_malloc in glib List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , Peter Maydell , =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= , Chris Metcalf Cc: "walt@tilera.com" , Riku Voipio , qemu-devel On 5/27/15 05:39, Chen Gang wrote: > On 5/12/15 05:26, Chen Gang wrote: >>>>>> +} >>>>>> + >>>>>> +/* >>>>>> + * Functional Description >>>>>> + * >>>>>> + * uint64_t output = 0; >>>>>> + * uint32_t counter; >>>>>> + * for (counter = 0; counter < (WORD_SIZE / 32); counter++) >>>>>> + * { >>>>>> + * bool asel = ((counter & 1) == 1); >>>>>> + * int in_sel = 0 + counter / 2; >>>>>> + * int32_t srca = get4Byte (rf[SrcA], in_sel); >>>>>> + * int32_t srcb = get4Byte (rf[SrcB], in_sel); >>>>>> + * output = set4Byte (output, counter, (asel ? srca : srcb)); >>>>>> + * } >>>>>> + * rf[Dest] = output; >>>>>> +*/ >>>>>> + >>>>>> +static void gen_v4int_l(struct DisasContext *dc, >>>>>> + uint8_t rdst, uint8_t rsrc, uint8_t rsrcb) >>>>>> +{ >>>>>> + TCGv vdst = dest_gr(dc, rdst); >>>>>> + TCGv tmp = tcg_temp_new_i64(); >>>>>> + >>>>>> + qemu_log_mask(CPU_LOG_TB_IN_ASM, "v4int_l r%d, r%d, r%d\n", >>>>>> + rdst, rsrc, rsrcb); >>>>>> + >>>>>> + tcg_gen_andi_i64(vdst, load_gr(dc, rsrc), 0xffffffff); >>>>>> + tcg_gen_shli_i64(vdst, vdst, 8); >>>>>> + tcg_gen_andi_i64(tmp, load_gr(dc, rsrcb), 0xffffffff); >>>>>> + tcg_gen_or_i64(vdst, vdst, tmp); >>>> >>>> And herein is a bug, that I'd hope using the helper functions would avoid: you >>>> shift by 8 instead of 32. This function simplifies to >>>> >> OK, thank you very much. >> >>>> tcg_gen_deposit_i64(vdst, load_gr(dc, rsrc), load_gr(dc, rsrcb), >>>> 32, 32); >>>> Oh, it should be: tcg_gen_deposit_i64(vdst, load_gr(dc, rsrcb), load_gr(dc, rsrc), 32, 32); > > Oh, it is: > > tcg_gen_deposit_i64(vdst, load_gr(dc, rsrc), load_gr(dc, rsrcb), > 0, 32); > >> OK, thanks. >> > > Thanks. > -- Chen Gang Open, share, and attitude like air, water, and life which God blessed