All of lore.kernel.org
 help / color / mirror / Atom feed
From: Aleksandar Markovic <amarkovic@wavecomp.com>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "aurelien@aurel32.net" <aurelien@aurel32.net>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	Stefan Markovic <smarkovic@wavecomp.com>,
	Petar Jovanovic <pjovanovic@wavecomp.com>,
	"laurent@vivier.eu" <laurent@vivier.eu>,
	"riku.voipio@iki.fi" <riku.voipio@iki.fi>
Subject: Re: [Qemu-devel] [PATCH v2 5/7] target/mips: Add availability control for DSP R3 ASE
Date: Mon, 8 Oct 2018 14:05:55 +0000	[thread overview]
Message-ID: <BN6PR2201MB12514961A2655922F25F8BBFC6E60@BN6PR2201MB1251.namprd22.prod.outlook.com> (raw)
In-Reply-To: <1538752793-6875-6-git-send-email-aleksandar.markovic@rt-rk.com>


> From: Stefan Markovic <smarkovic@wavecomp.com>
>
> Add infrastructure for availability control for DSP R3 ASE MIPS
instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but
this is likely to be changed in near future.
>
> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>

I think check_dspr3() should be check_dsp_r3(), but this will be then
inconsistent with  check_dspr3(). Consider a separate patch for refactoring
dsp r2/r3-related constant and function names. But that is beyond the scope
of this patch, so:

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>

  reply	other threads:[~2018-10-08 14:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-05 15:19 [Qemu-devel] [PATCH v2 0/7] Misc MIPS fixes and improvements for October 2018 Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 1/7] elf: Fix PT_MIPS_XXX constants Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 2/7] elf: Add MIPS_ABI_FP_XXX constants Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 3/7] elf: Add Mips_elf_abiflags_v0 structure Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 4/7] target/mips: Add bit definitions for DSP R3 ASE Aleksandar Markovic
2018-10-08 14:03   ` Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 5/7] target/mips: Add availability control " Aleksandar Markovic
2018-10-08 14:05   ` Aleksandar Markovic [this message]
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 6/7] target/mips: Add opcodes for nanoMIPS EVA instructions Aleksandar Markovic
2018-10-05 17:16   ` Philippe Mathieu-Daudé
2018-10-08 14:07   ` Aleksandar Markovic
2018-10-05 15:19 ` [Qemu-devel] [PATCH v2 7/7] target/mips: Implement emulation of " Aleksandar Markovic
2018-10-05 17:27   ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=BN6PR2201MB12514961A2655922F25F8BBFC6E60@BN6PR2201MB1251.namprd22.prod.outlook.com \
    --to=amarkovic@wavecomp.com \
    --cc=aleksandar.markovic@rt-rk.com \
    --cc=aurelien@aurel32.net \
    --cc=laurent@vivier.eu \
    --cc=pjovanovic@wavecomp.com \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=riku.voipio@iki.fi \
    --cc=smarkovic@wavecomp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.