From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tan, Ley Foon Date: Fri, 13 Nov 2020 03:48:18 +0000 Subject: [RESEND v2 03/22] arm: socfpga: dm: Add firewall support for Agilex and Diamond Mesa In-Reply-To: <20201110064439.9683-4-elly.siew.chin.lim@intel.com> References: <20201110064439.9683-1-elly.siew.chin.lim@intel.com> <20201110064439.9683-4-elly.siew.chin.lim@intel.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > -----Original Message----- > From: Lim, Elly Siew Chin > Sent: Tuesday, November 10, 2020 2:44 PM > To: u-boot at lists.denx.de > Cc: Marek Vasut ; Tan, Ley Foon > ; See, Chin Liang ; > Simon Goldschmidt ; Chee, Tien Fong > ; Westergreen, Dalon > ; Simon Glass ; Gan, > Yau Wai ; Lim, Elly Siew Chin > > Subject: [RESEND v2 03/22] arm: socfpga: dm: Add firewall support for Agilex > and Diamond Mesa > > Disable the MPFE firewall for SMMU and HMC adapter for Agilex and > Diamond Mesa. > > Signed-off-by: Siew Chin Lim > --- > arch/arm/mach-socfpga/firewall.c | 10 ++++++++++ > arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 1 + > arch/arm/mach-socfpga/include/mach/firewall.h | 6 ++++++ > 3 files changed, 17 insertions(+) > > diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach- > socfpga/firewall.c > index 69229dc651..b87cc8aa69 100644 > --- a/arch/arm/mach-socfpga/firewall.c > +++ b/arch/arm/mach-socfpga/firewall.c > @@ -104,4 +104,14 @@ void firewall_setup(void) > socfpga_get_sysmgr_addr() + SYSMGR_SOC64_DMA); > writel(SYSMGR_DMAPERIPH_ALL_NS, > socfpga_get_sysmgr_addr() + SYSMGR_SOC64_DMA_PERIPH); > + > +#if defined(CONFIG_TARGET_SOCFPGA_AGILEX) || > defined(CONFIG_TARGET_SOCFPGA_DM) > + /* Disable the MPFE Firewall for SMMU */ > + writel(FIREWALL_MPFE_SCR_DISABLE_ALL, > SOCFPGA_FW_MPFE_SCR_ADDRESS + > + FW_MPFE_SCR_HMC); > + /* Disable MPFE Firewall for HMC adapter (ECC) */ > + writel(FIREWALL_MPFE_SCR_DISABLE_MPU, > SOCFPGA_FW_MPFE_SCR_ADDRESS + > + FW_MPFE_SCR_HMC_ADAPTOR); > +#endif Stratix 10 also has these registers. Why Stratix 10 doesn't need this? Regards Ley Foon