From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tan, Ley Foon <ley.foon.tan@intel.com>
Date: Mon, 23 Nov 2020 10:57:31 +0000
Subject: [RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa
 build
In-Reply-To: <20201110064439.9683-23-elly.siew.chin.lim@intel.com>
References: <20201110064439.9683-1-elly.siew.chin.lim@intel.com>
 <20201110064439.9683-23-elly.siew.chin.lim@intel.com>
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> -----Original Message-----
> From: Lim, Elly Siew Chin <elly.siew.chin.lim@intel.com>
> Sent: Tuesday, November 10, 2020 2:45 PM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; See, Chin Liang <chin.liang.see@intel.com>;
> Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Westergreen, Dalon
> <dalon.westergreen@intel.com>; Simon Glass <sjg@chromium.org>; Gan,
> Yau Wai <yau.wai.gan@intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>
> Subject: [RESEND v2 22/22] arm: socfpga: dm: Enable Intel Diamond Mesa
> build
> 
> Add defconfig for Diamond Mesa to support both legacy boot flow and ATF
> boot flow.
> 
> Legacy boot:
> SPL -> U-Boot proper -> OS (Linux)
> 
> ATF boot flow:
> SPL -> ATF(BL31) -> U-Boot proper -> OS (Linux)
> 
> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
> ---
>  arch/arm/mach-socfpga/Kconfig    | 19 ++++++++++
>  arch/arm/mach-socfpga/Makefile   | 18 ++++++++++
>  configs/socfpga_dm_atf_defconfig | 76
> ++++++++++++++++++++++++++++++++++++++++
>  configs/socfpga_dm_defconfig     | 69
> ++++++++++++++++++++++++++++++++++++
>  4 files changed, 182 insertions(+)
>  create mode 100644 configs/socfpga_dm_atf_defconfig  create mode
> 100644 configs/socfpga_dm_defconfig
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
> socfpga/Kconfig index 4d061a9d0d..5dee193b31 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -66,6 +66,22 @@ config TARGET_SOCFPGA_CYCLONE5
>  	bool
>  	select TARGET_SOCFPGA_GEN5
> 
> +config TARGET_SOCFPGA_DM
> +	bool
> +	select TARGET_SOCFPGA_SOC64
> +	select ARMV8_MULTIENTRY
> +	select ARMV8_SET_SMPEN
> +	select CLK
> +	select FPGA_INTEL_SDM_MAILBOX
> +	select NCORE_CACHE
> +	select SPL_ALTERA_SDRAM
> +	select SPL_CLK if SPL
> +	select BINMAN
Sort in alphanumerical order.


Regards
Ley Foon