It'd always be a write followed by a read. Usually the write provides the
number of a register to be read.

The opposite order does not make much sense.

Paolo

Il gio 5 nov 2020, 07:35 Jie Deng <jie.deng@intel.com> ha scritto:

>
> On 2020/10/31 21:58, Paolo Bonzini wrote:
>
> On 27/10/20 12:20, Michael S. Tsirkin wrote:
>
> The I2C doesn't support segments numbering and sorting.
> So if one creates a multi-segment transaction, then he/she should keep the
> segments in order.
>
> Thanks.
>
> Fine, but I see no flags to signal start/end of such a transaction.
>
>
>
> In theory there's no difference between one multi-segment transaction
> and many single-segment transactions _in a single-master scenario_.
>
> However, it is a plausible configuration to have multiple guests sharing
> an I2C host device as if they were multiple master.
>
> For this reason, I would prefer to have at least support for
> transactions with 1 write and 1 read segment to the same address (see my
> other message).
>
> Paolo
>
> Then how to distinguish the order of the two segments if they are in one
> request ?
> We don't know this is a write followed by a read or a read followed by a
> write in this case.
>
> However, if the request is the representation of only one segment of an
> I2C transaction,
> we can simply judge by the order of the requests in the virtqueue.
>
> Thanks
>
>