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From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: "Christian König" <deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
Cc: amd-gfx list <amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Subject: Re: [PATCH 5/8] drm/amdgpu: assign VM invalidation engine manually v2
Date: Tue, 11 Apr 2017 10:43:13 -0400	[thread overview]
Message-ID: <CADnq5_O+3X-BB8Yj5qeJ=pONu596My1k92yxfUCHq4khNKEeGA@mail.gmail.com> (raw)
In-Reply-To: <1491900260-10001-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>

On Tue, Apr 11, 2017 at 4:44 AM, Christian König
<deathsimple@vodafone.de> wrote:
> From: Christian König <christian.koenig@amd.com>
>
> For Vega10 we have 18 VM invalidation engines for each VMHUB.
>
> Start to assign them manually to the rings.
>
> v2: add a BUG_ON if we use to many engines
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)

RB for v2 as well.

Alex

> Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c    | 16 ++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c    |  4 ++--
>  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c    |  2 +-
>  6 files changed, 22 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 45bb87b..5786cc3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -179,6 +179,7 @@ struct amdgpu_ring {
>         unsigned                cond_exe_offs;
>         u64                     cond_exe_gpu_addr;
>         volatile u32            *cond_exe_cpu_addr;
> +       unsigned                vm_inv_eng;
>  #if defined(CONFIG_DEBUG_FS)
>         struct dentry *ent;
>  #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 55a17ce..f6b2329 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -2959,7 +2959,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>         struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>         int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
>         uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
> -       unsigned eng = ring->idx;
> +       unsigned eng = ring->vm_inv_eng;
>
>         pd_addr = pd_addr | 0x1; /* valid bit */
>         /* now only use physical base address of PDE and valid */
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 7f5cc75..a71521e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -386,6 +386,22 @@ static int gmc_v9_0_early_init(void *handle)
>  static int gmc_v9_0_late_init(void *handle)
>  {
>         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> +       unsigned vm_inv_eng[AMDGPU_MAX_VMHUBS] = { 0 };
> +       unsigned i;
> +
> +       for(i = 0; i < adev->num_rings; ++i) {
> +               struct amdgpu_ring *ring = adev->rings[i];
> +               unsigned vmhub = ring->funcs->vmhub;
> +
> +               ring->vm_inv_eng = vm_inv_eng[vmhub]++;
> +               dev_info(adev->dev, "ring %u uses VM inv eng %u on hub %u\n",
> +                        ring->idx, ring->vm_inv_eng, ring->funcs->vmhub);
> +       }
> +
> +       /* Engine 17 is used for GART flushes */
> +       for(i = 0; i < AMDGPU_MAX_VMHUBS; ++i)
> +               BUG_ON(vm_inv_eng[i] > 17);
> +
>         return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
>  }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index add9371..d5065a1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1041,7 +1041,7 @@ static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  {
>         struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>         uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
> -       unsigned eng = ring->idx;
> +       unsigned eng = ring->vm_inv_eng;
>
>         pd_addr = pd_addr | 0x1; /* valid bit */
>         /* now only use physical base address of PDE and valid */
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> index 45e86f8..bf35d56 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
> @@ -1037,7 +1037,7 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
>         struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>         uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
>         uint32_t data0, data1, mask;
> -       unsigned eng = ring->idx;
> +       unsigned eng = ring->vm_inv_eng;
>
>         pd_addr = pd_addr | 0x1; /* valid bit */
>         /* now only use physical base address of PDE and valid */
> @@ -1078,7 +1078,7 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
>  {
>         struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>         uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
> -       unsigned eng = ring->idx;
> +       unsigned eng = ring->vm_inv_eng;
>
>         pd_addr = pd_addr | 0x1; /* valid bit */
>         /* now only use physical base address of PDE and valid */
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> index c567d13..76fc8ed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> @@ -970,7 +970,7 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
>  {
>         struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
>         uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
> -       unsigned eng = ring->idx;
> +       unsigned eng = ring->vm_inv_eng;
>
>         pd_addr = pd_addr | 0x1; /* valid bit */
>         /* now only use physical base address of PDE and valid */
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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  parent reply	other threads:[~2017-04-11 14:43 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-11  8:44 [PATCH 1/8] drm/amdgpu: add VMHUB to ring association Christian König
     [not found] ` <1491900260-10001-1-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11  8:44   ` [PATCH 2/8] drm/amdgpu: drop VMID per ring tracking Christian König
     [not found]     ` <1491900260-10001-2-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11 16:01       ` Alex Deucher
2017-04-11  8:44   ` [PATCH 3/8] drm/amdgpu: split VMID management by VMHUB Christian König
     [not found]     ` <1491900260-10001-3-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11 14:42       ` Alex Deucher
2017-04-11  8:44   ` [PATCH 4/8] drm/amdgpu: invalidate only the currently needed VMHUB v2 Christian König
2017-04-11  8:44   ` [PATCH 5/8] drm/amdgpu: assign VM invalidation engine manually v2 Christian König
     [not found]     ` <1491900260-10001-5-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11 14:43       ` Alex Deucher [this message]
2017-04-11  8:44   ` [PATCH 6/8] drm/amdgpu: allow concurrent VM flushes Christian König
2017-04-11  8:44   ` [PATCH 7/8] drm/amdgpu: trace the vmhub in grab_id as well Christian König
     [not found]     ` <1491900260-10001-7-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11 14:44       ` Alex Deucher
2017-04-11  8:44   ` [PATCH 8/8] drm/amdgpu: trace vm hub during flush as well v2 Christian König
     [not found]     ` <1491900260-10001-8-git-send-email-deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-04-11 14:44       ` Alex Deucher

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