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From: Meng Xu <xumengpanda@gmail.com>
To: Andrii Anisov <andrii_anisov@epam.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: RT-Xen on ARM
Date: Mon, 21 Aug 2017 22:02:58 -0400	[thread overview]
Message-ID: <CAENZ-+nf8359D6FtyrNibFzeMp8Ph4eV5M4-A22cwLQ0Ok+OOw@mail.gmail.com> (raw)
In-Reply-To: <de1b463e-9fd3-7e5a-59c0-7271ea42b120@epam.com>

On Mon, Aug 21, 2017 at 4:16 AM, Andrii Anisov <andrii_anisov@epam.com> wrote:
>
> On 21.08.17 11:07, Andrii Anisov wrote:
>>
>> Hello Meng Xu,
>>
>>
>> On 18.08.17 23:43, Meng Xu wrote:
>>>
>>> The Section 4.1 and 4.2 in [1] explained the whole experiment steps.
>>> If you have any question or confusion on a specific step, please feel
>>> free to let me know.
>>
>> From the document it is not really clear if you ran one guest RT domain or
>> several simultaneously for your experiments.
>
> Also it is not described XEN RT scheduler setup like vcpus period/budget
> configuration for each guest domain.
> It is not obvious if the configured set of vcpus in the experiment setup
> utilized all the pcpus bandwidth.
>

Given the set of tasks in each VM, we compute the VCPUs' periods and
budgets, using the CARTS tool [1]. Note that each task has a period
and a worst-case execution time (wcet).

The configured set of vcpus in the experiment setup may not use all
pcpus bandwidth. For example, if we have one task (period = 10ms, wcet
= 2ms) on a VCPU, the VCPU of the task will not be configured with
100% bandwidth. If the VCPU is the only VCPU on a pcpu, that pcpu
bandwidth won't be fully used because there is not enough workload to
fully use all pcpu bandwidth.

[1] https://rtg.cis.upenn.edu/carts/

Best,

Meng
-----------
Meng Xu
PhD Candidate in Computer and Information Science
University of Pennsylvania
http://www.cis.upenn.edu/~mengxu/

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  reply	other threads:[~2017-08-22  2:03 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-03 11:03 RT-Xen on ARM Andrii Anisov
2017-07-03 13:03 ` Wei Liu
2017-07-03 13:26   ` Andrii Anisov
2017-07-03 13:35 ` Meng Xu
2017-07-03 14:58   ` Andrii Anisov
2017-07-03 18:42     ` Meng Xu
2017-07-04 12:28       ` Andrii Anisov
2017-07-04 15:12         ` Meng Xu
2017-07-05  8:29           ` Dario Faggioli
2017-07-07 18:29             ` Meng Xu
2017-07-12  6:13               ` Dario Faggioli
2017-07-05  8:42         ` Dario Faggioli
2017-07-05  8:51       ` Dario Faggioli
2017-07-07 18:43         ` Meng Xu
2017-07-07 18:46           ` Meng Xu
2017-07-10  9:22           ` Andrii Anisov
2017-08-01 11:02     ` Andrii Anisov
2017-08-18 20:43       ` Meng Xu
2017-08-21  8:07         ` Andrii Anisov
2017-08-21  8:16           ` Andrii Anisov
2017-08-22  2:02             ` Meng Xu [this message]
2017-09-27 12:37               ` Andrii Anisov
2017-09-27 13:57                 ` Meng Xu
2017-09-27 14:37                   ` Andrii Anisov
2017-09-27 19:57                     ` Meng Xu
2017-09-28  9:18                       ` Andrii Anisov
2017-09-28 16:01                         ` Dario Faggioli
2017-09-28 17:56                           ` Dario Faggioli
2017-09-29 10:24                           ` Andrii Anisov
2017-10-09 15:38                         ` Meng Xu
2017-08-22  1:58           ` Meng Xu
2017-08-21  8:38         ` Andrii Anisov
2017-08-22  2:19           ` Meng Xu
2017-07-05  7:33 ` Dario Faggioli

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