On Sat, Nov 21, 2020 at 12:24 AM Alistair Francis wrote: > > > On 19/11/2020 7:02 pm, Kito Cheng wrote: > >> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > >> index 0bbfd7f4574..bc29e118c6d 100644 > >> --- a/target/riscv/cpu.c > >> +++ b/target/riscv/cpu.c > >> @@ -438,6 +438,9 @@ static void riscv_cpu_realize(DeviceState *dev, > Error **errp) > >> if (cpu->cfg.ext_h) { > >> target_misa |= RVH; > >> } > >> + if (cpu->cfg.ext_b) { > >> + target_misa |= RVB; > >> + } > >> if (cpu->cfg.ext_v) { > >> target_misa |= RVV; > >> if (!is_power_of_2(cpu->cfg.vlen)) { > >> @@ -515,6 +518,7 @@ static Property riscv_cpu_properties[] = { > >> DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true), > >> DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true), > >> /* This is experimental so mark with 'x-' */ > >> + DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, true), > > > > I think the default value should be false? > > Good catch, I missed that. > > Yes it should be false. > > Alistair > Thanks, I'll fix it in my next patchset. Frank Chang > > > > >> DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false), > >> DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false), > >> DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true), > > >