From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E41FECAAD8 for ; Fri, 23 Sep 2022 01:06:50 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 69B5B84CFF; Fri, 23 Sep 2022 03:06:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MfkF6LKQ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id ACDAB84CFF; Fri, 23 Sep 2022 03:06:44 +0200 (CEST) Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 474F1849F4 for ; Fri, 23 Sep 2022 03:06:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=judge.packham@gmail.com Received: by mail-ed1-x52e.google.com with SMTP id z2so15995235edi.1 for ; Thu, 22 Sep 2022 18:06:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=9jnajZAKfvVg29qO/oOXE5kRf9xfnvQAA8MRyoU4+Rw=; b=MfkF6LKQfoMEYncLvhzLVzSwCExTGliPr9jrVnoWSFoIaA7EednVMAyWZs89pCa2Ka BeGv50QKhDF4FT9VVVl+alnglU3jGRu+UkiCVLdvPk9SApLgUYByCBe8MsZ23YItQiGF E+TxxqdkSXIYYTOtRwjOedQy249+TjDjDmcSFF656HZ6sSneX51qxIOJY2oBMFnJN/m1 REODqJhzKVKi2PB2kG3XjTjXJzlnaB7mGpFKtdEiMk5D4CPqHPDw4OkMPrAOYNvE13oR AEQ2hC/IEciNs22OKdldZx/MnrmaytBxeCfR3VlrN6QkjDKIRUnuu4iiSqTu8xf15gsN +sSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=9jnajZAKfvVg29qO/oOXE5kRf9xfnvQAA8MRyoU4+Rw=; b=Uh4JxnsVchI0v6W8aY+49ZQ44rUdKuFBnEtPp8ev5UhIU4wwx5EanA6C0Fko9L1QpC zmxTfVXNAtg5H9W8LpzlYWbyALPFYzH+QUOwJyyuNB/iKWSYD+D2pzS8ws9+j9vyFSeX AyJoyQL8QvzW7L+Zuzd2Fr/GEpGsV3IN2IXC9rlfnj8FNZeCNpoh2XFk21etZ83S7Kqj utYnMMDEbs0584KBajMwhiTtyJhEYcXuaDTr+/x9IngvLJTTwB4YhfO4D00/BetCGa/6 9g1wSUbNtAES6mTzhsenTt/c4P9cFSWKtywja9FNHoe+JcRZsnbaNxAN/knzeKC77Q9g tuWQ== X-Gm-Message-State: ACrzQf1EO+0ICF+qstyrXlHJsRWVais4R3faex2pBNIatJnDGWmLmdRm 0nf3Vm8nr3Ae5zg/hIVaa5b47FDwFq8Sv5fTPrk= X-Google-Smtp-Source: AMsMyM7zunOVzt+pdl33isMwRDX1aC3hG84aOHqqGw+ovNa41IXmfi3vNRBjYrFNJRHRjZgMkGSSc/HJNUedHh3fBrI= X-Received: by 2002:a05:6402:156:b0:440:b458:93df with SMTP id s22-20020a056402015600b00440b45893dfmr6172243edu.337.1663895200724; Thu, 22 Sep 2022 18:06:40 -0700 (PDT) MIME-Version: 1.0 References: <20220922033116.915635-1-judge.packham@gmail.com> <20220922033116.915635-3-judge.packham@gmail.com> In-Reply-To: From: Chris Packham Date: Fri, 23 Sep 2022 13:06:27 +1200 Message-ID: Subject: Re: [PATCH v4 2/5] usb: ehci: ehci-marvell: Support for marvell, ac5-ehci To: Stefan Roese Cc: Elad Nachman , Vadym Kochan , Adam Ford , Lukasz Majewski , =?UTF-8?B?TWFyZWsgQmVow7pu?= , Marek Vasut , =?UTF-8?Q?Pali_Roh=C3=A1r?= , Weijie Gao , u-boot Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Thu, Sep 22, 2022 at 5:18 PM Stefan Roese wrote: > > On 22.09.22 05:31, Chris Packham wrote: > > Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci > > block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with > > the fact that the ac5 does not have the mbus infrastructure the 32-bit > > SoCs have and ensure USB_EHCI_IS_TDI is selected. > > > > Signed-off-by: Chris Packham > > --- > > > > (no changes since v1) > > > > drivers/usb/host/Kconfig | 1 + > > drivers/usb/host/ehci-marvell.c | 57 +++++++++++++++++++++++++++------ > > 2 files changed, 48 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig > > index a0f48f09a7..628078f495 100644 > > --- a/drivers/usb/host/Kconfig > > +++ b/drivers/usb/host/Kconfig > > @@ -178,6 +178,7 @@ config USB_EHCI_MARVELL > > depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X > > default y > > select USB_EHCI_IS_TDI if !ARM64 > > + select USB_EHCI_IS_TDI if ALLEYCAT_5 > > ---help--- > > Enables support for the on-chip EHCI controller on MVEBU SoCs. > > > > diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c > > index b7e60c690a..7d859b9cce 100644 > > --- a/drivers/usb/host/ehci-marvell.c > > +++ b/drivers/usb/host/ehci-marvell.c > > @@ -48,12 +48,17 @@ struct ehci_mvebu_priv { > > fdt_addr_t hcd_base; > > }; > > > > +#define USB_TO_DRAM_TARGET_ID 0x2 > > +#define USB_TO_DRAM_ATTR_ID 0x0 > > +#define USB_DRAM_BASE 0x00000000 > > +#define USB_DRAM_SIZE 0xfff /* don't overrun u-boot source (was 0xffff) */ > > + > > /* > > * Once all the older Marvell SoC's (Orion, Kirkwood) are converted > > * to the common mvebu archticture including the mbus setup, this > > * will be the only function needed to configure the access windows > > */ > > -static void usb_brg_adrdec_setup(void *base) > > +static void usb_brg_adrdec_setup(struct udevice *dev, void *base) > > { > > const struct mbus_dram_target_info *dram; > > int i; > > @@ -65,16 +70,34 @@ static void usb_brg_adrdec_setup(void *base) > > writel(0, base + USB_WINDOW_BASE(i)); > > } > > > > - for (i = 0; i < dram->num_cs; i++) { > > - const struct mbus_dram_window *cs = dram->cs + i; > > + if (device_is_compatible(dev, "marvell,ac5-ehci")) { > > + /* > > + * use decoding window to map dram address seen by usb to 0x0 > > + */ > > > > /* Write size, attributes and target id to control register */ > > - writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | > > - (dram->mbus_dram_target_id << 4) | 1, > > - base + USB_WINDOW_CTRL(i)); > > + writel((USB_DRAM_SIZE << 16) | (USB_TO_DRAM_ATTR_ID << 8) | > > + (USB_TO_DRAM_TARGET_ID << 4) | 1, > > + base + USB_WINDOW_CTRL(0)); > > Nitpicking / coding-style comment: Not aligned with the '(' in the > line above. I assume that checkpatch.pl will complain here. > Doesn't seem to complain about this (ran manually and via patman). I'll fix it regardless. > > > > /* Write base address to base register */ > > - writel(cs->base, base + USB_WINDOW_BASE(i)); > > + writel(USB_DRAM_BASE, base + USB_WINDOW_BASE(0)); > > + > > + debug("## AC5 decoding windows, ctrl[%p]=0x%x, base[%p]=0x%x\n", > > + base + USB_WINDOW_CTRL(0), readl(base + USB_WINDOW_CTRL(0)), > > + base + USB_WINDOW_BASE(0), readl(base + USB_WINDOW_BASE(0))); > > + } else { > > + for (i = 0; i < dram->num_cs; i++) { > > + const struct mbus_dram_window *cs = dram->cs + i; > > + > > + /* Write size, attributes and target id to control register */ > > + writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | > > + (dram->mbus_dram_target_id << 4) | 1, > > + base + USB_WINDOW_CTRL(i)); > > + > > + /* Write base address to base register */ > > + writel(cs->base, base + USB_WINDOW_BASE(i)); > > + } > > } > > } > > > > @@ -126,15 +149,28 @@ static int ehci_mvebu_probe(struct udevice *dev) > > if (device_is_compatible(dev, "marvell,armada-3700-ehci")) > > marvell_ehci_ops.powerup_fixup = marvell_ehci_powerup_fixup; > > else > > - usb_brg_adrdec_setup((void *)priv->hcd_base); > > + usb_brg_adrdec_setup(dev, (void *)priv->hcd_base); > > > > hccr = (struct ehci_hccr *)(priv->hcd_base + 0x100); > > hcor = (struct ehci_hcor *) > > ((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); > > > > debug("ehci-marvell: init hccr %lx and hcor %lx hc_length %ld\n", > > - (uintptr_t)hccr, (uintptr_t)hcor, > > - (uintptr_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); > > + (uintptr_t)hccr, (uintptr_t)hcor, > > + (uintptr_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); > > Unrelated change of indentation (see above). > Yep will remove > > + > > +#define PHY_CALIB_OFFSET 0x808 > > + /* > > + * Trigger calibration during each usb start/reset: > > + * BIT 13 to 0, and then to 1 > > + */ > > + if (device_is_compatible(dev, "marvell,ac5-ehci")) { > > + void *phy_calib_reg = (void *)(priv->hcd_base + PHY_CALIB_OFFSET); > > + u32 val = readl(phy_calib_reg) & (~BIT(13)); > > + > > + writel(val, phy_calib_reg); > > + writel(val | BIT(13), phy_calib_reg); > > + } > > > > return ehci_register(dev, hccr, hcor, &marvell_ehci_ops, 0, > > USB_INIT_HOST); > > @@ -143,6 +179,7 @@ static int ehci_mvebu_probe(struct udevice *dev) > > static const struct udevice_id ehci_usb_ids[] = { > > { .compatible = "marvell,orion-ehci", }, > > { .compatible = "marvell,armada-3700-ehci", }, > > + { .compatible = "marvell,ac5-ehci", }, > > { } > > }; > > > > Other than this: > > Reviewed-by: Stefan Roese > > Thanks, > Stefan