From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D1FAC4BA24 for ; Thu, 27 Feb 2020 12:11:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3A03424695 for ; Thu, 27 Feb 2020 12:11:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=verdurent-com.20150623.gappssmtp.com header.i=@verdurent-com.20150623.gappssmtp.com header.b="WnH2J12/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728976AbgB0MLR (ORCPT ); Thu, 27 Feb 2020 07:11:17 -0500 Received: from mail-ua1-f68.google.com ([209.85.222.68]:34873 "EHLO mail-ua1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728856AbgB0MLR (ORCPT ); Thu, 27 Feb 2020 07:11:17 -0500 Received: by mail-ua1-f68.google.com with SMTP id y23so860828ual.2 for ; Thu, 27 Feb 2020 04:11:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=verdurent-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=maw8fNiBZ+S2xv6T6LqluUYlWnMWB69qS0344f6fpEE=; b=WnH2J12/8/JJX+kKUCb5VZGwQLfj8WV4pZf93vOutsFpK4XJxfFRUJdp5rCI/YqLLk 9bx5GfFILgWU9q32avz26AGXCIlaiyjXicPiQaSXIRsRl6kdDnfiEVprwdCF6e0raIej 4oFu5TFe3aVlltqr4TVCV5+epg52KTMrxmJS9Ul0+9iRK2G9OYHaAbrMTU9kexipWyHu PVahiBTbhJpkjvY6kTFgUiI2heciM2dmQrsppsGQgzuYGfHmM3ud8vMfmTJKKc6WF+Sh mrkPd+07a/BKGTAMX+GAQpJ7M6NNaqSnkixe8x3YwfQbggjN0X0yjWn/B+Fxb8YC7Ozy KhcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=maw8fNiBZ+S2xv6T6LqluUYlWnMWB69qS0344f6fpEE=; b=Vp3QtwFRTJueOkbF6tFtKm0qzuqLi7wEW3y3xaVUascoWiNIx+XJlrs9wHKtpC4mwv zjeTAE0VjX0MGcaxWJiaOIqN1TWqgxp0l8b7TBkdhqzV78rvRSsdZyL3U4JaGFDqpI/x FQ1yOGRjCUOHy8ZJ/xHSbD969U3tyBLlRE4h9YFZxGfg7n8642Krj+rqrfQYnfh9498D tJr8ycGcpseamuEeaQbOJx8Hn4UPuJxaPEp+m+HCeT8UtAcKgkn4ZdisR7zY0t+sFUSm DXC1+/BC/4tBMXkf1wGV5r36POXQUZt2KY/eD9d29WbavNY535CCM94Dy3Hb2TYfFtQ9 xjnw== X-Gm-Message-State: APjAAAUmu7FJx8ofCGjnZLhtwYX2gorI4piP3P3/0e3h8/IRzH1dkcrK KVMoZ9hV4gYYExwoVaUtiV3L1a3qSglJQtupPZOAyw== X-Google-Smtp-Source: APXvYqzGAVBcfDoQ/3mCviHMDzmELhH3MdSHbuNtZGC3bH2Uh2LGIuyBsUKc4ZGbkF4Je69N7zVEnv4lgayLX9gobWs= X-Received: by 2002:ab0:2819:: with SMTP id w25mr1023157uap.67.1582805474959; Thu, 27 Feb 2020 04:11:14 -0800 (PST) MIME-Version: 1.0 References: <1581946205-27189-1-git-send-email-akashast@codeaurora.org> <1581946205-27189-7-git-send-email-akashast@codeaurora.org> In-Reply-To: <1581946205-27189-7-git-send-email-akashast@codeaurora.org> From: Amit Kucheria Date: Thu, 27 Feb 2020 17:41:03 +0530 Message-ID: Subject: Re: [PATCH 6/6] arm64: dts: sc7180: Add interconnect for QUP and QSPI To: Akash Asthana Cc: Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , wsa@the-dreams.de, broonie@kernel.org, Mark Rutland , Rob Herring , linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Stephen Boyd , mgautam@codeaurora.org, linux-arm-msm , linux-serial@vger.kernel.org, Matthias Kaehlcke , Douglas Anderson Content-Type: text/plain; charset="UTF-8" Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi Akash, On Mon, Feb 17, 2020 at 7:01 PM Akash Asthana wrote: > > Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. > > Signed-off-by: Akash Asthana > --- > Note: > - This patch depends on series https://patchwork.kernel.org/cover/11313817/ > [Add SC7180 interconnect provider driver]. It won't compile without that. I've tried picking up v4 of Odelu's series to add the SC7180 but I'm still unable to compile this. I see the following error: Error: /home/amit/work/sources/worktree-review-pipeline/arch/arm64/boot/dts/qcom/sc7180.dtsi:353.32-33 syntax error FATAL ERROR: Unable to parse input tree make[3]: *** [scripts/Makefile.lib:296: arch/arm64/boot/dts/qcom/sc7180-idp.dtb] Error 1 As part of picking up the dependencies, I've pulled the following series on top of v5.6-rc2: - https://lore.kernel.org/r/1581932974-21654-2-git-send-email-akashast@codeaurora.org - https://lore.kernel.org/r/1581932212-19469-2-git-send-email-akashast@codeaurora.org - https://lore.kernel.org/r/1581946205-27189-2-git-send-email-akashast@codeaurora.org - https://lore.kernel.org/r/1582646384-1458-2-git-send-email-okukatla@codeaurora.org - https://lore.kernel.org/r/20200209183411.17195-2-sibis@codeaurora.org What am I missing? I've pushed the aggregate branch here for convenience: https://git.linaro.org/people/amit.kucheria/kernel.git/log/ Regards, Amit > arch/arm64/boot/dts/qcom/sc7180.dtsi | 199 +++++++++++++++++++++++++++++++++++ > 1 file changed, 199 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index cc5a94f..04569c9 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -352,6 +352,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -365,6 +373,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -376,6 +389,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart0_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -389,6 +407,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -402,6 +428,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -413,6 +444,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart1_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -426,6 +462,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -437,6 +481,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart2_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -450,6 +499,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -463,6 +520,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -474,6 +536,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart3_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -487,6 +554,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -498,6 +573,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart4_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -511,6 +591,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -524,6 +612,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -535,6 +628,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart5_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > }; > @@ -561,6 +659,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -574,6 +680,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -585,6 +696,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart6_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -598,6 +714,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -609,6 +733,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart7_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -622,6 +751,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -635,6 +772,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -646,6 +788,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart8_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -659,6 +806,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -670,6 +825,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart9_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -683,6 +843,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -696,6 +864,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -707,6 +880,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart10_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -720,6 +898,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -733,6 +919,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -744,6 +935,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart11_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > }; > @@ -1051,6 +1247,9 @@ > clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > <&gcc GCC_QSPI_CORE_CLK>; > clock-names = "iface", "core"; > + interconnects = <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QSPI_0>; > + interconnect-names = "qspi-config"; > status = "disabled"; > }; > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 From: Amit Kucheria Subject: Re: [PATCH 6/6] arm64: dts: sc7180: Add interconnect for QUP and QSPI Date: Thu, 27 Feb 2020 17:41:03 +0530 Message-ID: References: <1581946205-27189-1-git-send-email-akashast@codeaurora.org> <1581946205-27189-7-git-send-email-akashast@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <1581946205-27189-7-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Sender: linux-spi-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Akash Asthana Cc: Greg Kroah-Hartman , Andy Gross , Bjorn Andersson , wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org, broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Mark Rutland , Rob Herring , linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Stephen Boyd , mgautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-arm-msm , linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Matthias Kaehlcke , Douglas Anderson List-Id: linux-i2c@vger.kernel.org Hi Akash, On Mon, Feb 17, 2020 at 7:01 PM Akash Asthana wrote: > > Add interconnect ports for GENI QUPs and QSPI to set bus capabilities. > > Signed-off-by: Akash Asthana > --- > Note: > - This patch depends on series https://patchwork.kernel.org/cover/11313817/ > [Add SC7180 interconnect provider driver]. It won't compile without that. I've tried picking up v4 of Odelu's series to add the SC7180 but I'm still unable to compile this. I see the following error: Error: /home/amit/work/sources/worktree-review-pipeline/arch/arm64/boot/dts/qcom/sc7180.dtsi:353.32-33 syntax error FATAL ERROR: Unable to parse input tree make[3]: *** [scripts/Makefile.lib:296: arch/arm64/boot/dts/qcom/sc7180-idp.dtb] Error 1 As part of picking up the dependencies, I've pulled the following series on top of v5.6-rc2: - https://lore.kernel.org/r/1581932974-21654-2-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - https://lore.kernel.org/r/1581932212-19469-2-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - https://lore.kernel.org/r/1581946205-27189-2-git-send-email-akashast-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - https://lore.kernel.org/r/1582646384-1458-2-git-send-email-okukatla-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - https://lore.kernel.org/r/20200209183411.17195-2-sibis-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org What am I missing? I've pushed the aggregate branch here for convenience: https://git.linaro.org/people/amit.kucheria/kernel.git/log/ Regards, Amit > arch/arm64/boot/dts/qcom/sc7180.dtsi | 199 +++++++++++++++++++++++++++++++++++ > 1 file changed, 199 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index cc5a94f..04569c9 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -352,6 +352,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -365,6 +373,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -376,6 +389,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart0_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -389,6 +407,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -402,6 +428,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -413,6 +444,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart1_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -426,6 +462,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -437,6 +481,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart2_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -450,6 +499,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -463,6 +520,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -474,6 +536,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart3_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -487,6 +554,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -498,6 +573,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart4_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -511,6 +591,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>, > + <&aggre1_noc MASTER_QUP_0 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -524,6 +612,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -535,6 +628,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart5_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_0 > + &qup_virt SLAVE_QUP_CORE_0>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_0>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > }; > @@ -561,6 +659,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -574,6 +680,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -585,6 +696,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart6_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -598,6 +714,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -609,6 +733,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart7_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -622,6 +751,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -635,6 +772,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -646,6 +788,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart8_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -659,6 +806,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -670,6 +825,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart9_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -683,6 +843,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -696,6 +864,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -707,6 +880,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart10_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -720,6 +898,14 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>, > + <&aggre2_noc MASTER_QUP_1 > + &mc_virt SLAVE_EBI1>; > + interconnect-names = "qup-core", "qup-config", > + "qup-memory"; > status = "disabled"; > }; > > @@ -733,6 +919,11 @@ > interrupts = ; > #address-cells = <1>; > #size-cells = <0>; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > > @@ -744,6 +935,11 @@ > pinctrl-names = "default"; > pinctrl-0 = <&qup_uart11_default>; > interrupts = ; > + interconnects = <&qup_virt MASTER_QUP_CORE_1 > + &qup_virt SLAVE_QUP_CORE_1>, > + <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QUP_1>; > + interconnect-names = "qup-core", "qup-config"; > status = "disabled"; > }; > }; > @@ -1051,6 +1247,9 @@ > clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, > <&gcc GCC_QSPI_CORE_CLK>; > clock-names = "iface", "core"; > + interconnects = <&gem_noc MASTER_APPSS_PROC > + &config_noc SLAVE_QSPI_0>; > + interconnect-names = "qspi-config"; > status = "disabled"; > }; > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project