From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A09B4C04E87 for ; Fri, 17 May 2019 08:58:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7A7DF20833 for ; Fri, 17 May 2019 08:58:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728260AbfEQI6z convert rfc822-to-8bit (ORCPT ); Fri, 17 May 2019 04:58:55 -0400 Received: from mail-qt1-f194.google.com ([209.85.160.194]:43033 "EHLO mail-qt1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727826AbfEQI6z (ORCPT ); Fri, 17 May 2019 04:58:55 -0400 Received: by mail-qt1-f194.google.com with SMTP id i26so7087045qtr.10; Fri, 17 May 2019 01:58:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=lUdOq+gx0nXT1b9GsinnX5s7hPrX6YoGJqW2/FU2LMQ=; b=RpFOr0oULuR1MRqxeLyOGuqnuiWmU7o6cdQmtSQp/pycQhETac42PTjvn6/ofo1spL Daby4SFcb06zg15P6ZQF2Rz6H6NpLXDUgJCa4dj7VLi5MTJwMNUFyeqSFE5CJ92px9Ea 5PI3QaoE+c/QzQipbrGJC88aCXF2V9/7Jf5SxHFZgcuebS4/crD996H4bhSIeAJyH40+ xD54ooqmEtJrjVAMmN/goOX0OYwSLQAh/d2g+vk4/dM6vTYnq69KmcefPCbVyDsN+NFz dlTjl7SbXa4A4pn6bVvV9xoMCBUZOIMWS1FZm9VYQgOqiTEfjEWRbicHlnXyUctHzGBa KE6w== X-Gm-Message-State: APjAAAXzbiusdx1c0HgvWDtVkYxDT+WrPOb4RW53MWOVLFRCHoQcQXPu K3+Uc+JtSwgGx8KNe36Jorai0/woxKU8/Qo3/rw= X-Google-Smtp-Source: APXvYqwNxbxFr/vzS1RXQZDBTDKL/hVCvagOotGDm724YF5ym/q8RL/him/sN27hB8O1MZtVcEFf95bHEOo3m0FhXo8= X-Received: by 2002:ac8:2a05:: with SMTP id k5mr30063052qtk.304.1558083534352; Fri, 17 May 2019 01:58:54 -0700 (PDT) MIME-Version: 1.0 References: <20190515072747.39941-1-xiaowei.bao@nxp.com> <20190515072747.39941-2-xiaowei.bao@nxp.com> In-Reply-To: From: Arnd Bergmann Date: Fri, 17 May 2019 10:58:37 +0200 Message-ID: Subject: Re: [EXT] Re: [PATCH 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes To: Xiaowei Bao Cc: Bjorn Helgaas , Rob Herring , Mark Rutland , Shawn Guo , Leo Li , Kishon , Lorenzo Pieralisi , gregkh , "M.h. Lian" , Mingkai Hu , Roy Zang , Kate Stewart , Philippe Ombredanne , Shawn Lin , linux-pci , DTML , Linux Kernel Mailing List , Linux ARM , linuxppc-dev Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 17, 2019 at 5:21 AM Xiaowei Bao wrote: > -----Original Message----- > From: Arnd Bergmann > On Wed, May 15, 2019 at 9:36 AM Xiaowei Bao wrote: > > Signed-off-by: Xiaowei Bao > > --- > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++++++++++++++++++++++++ > > 1 files changed, 52 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > index b045812..50b579b 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > @@ -398,6 +398,58 @@ > > status = "disabled"; > > }; > > > > + pcie@3400000 { > > + compatible = "fsl,ls1028a-pcie"; > > + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ > > + 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ > > + reg-names = "regs", "config"; > > + interrupts = , /* PME interrupt */ > > + ; /* aer interrupt */ > > + interrupt-names = "pme", "aer"; > > + #address-cells = <3>; > > + #size-cells = <2>; > > + device_type = "pci"; > > + dma-coherent; > > + num-lanes = <4>; > > + bus-range = <0x0 0xff>; > > + ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ > > + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > Are you sure there is no support for 64-bit BARs or prefetchable memory? > [Xiaowei Bao] sorry for late reply, Thought that our Layerscape platform has not added prefetchable memory support in DTS, so this platform has not been added, I will submit a separate patch to add prefetchable memory support for all Layerscape platforms. Ok, thanks. > Of course, the prefetchable PCIE device can work in our boards, because the RC will > assign non-prefetchable memory for this device. We reserve 1G no-prefetchable > memory for PCIE device, it is enough for general devices. Sure, many devices work just fine, this is mostly a question of supporting those devices that do require multiple gigabytes, or that need prefetchable memory semantics to get the expected performance. GPUs are the obvious example, but I think there are others (infiniband?). Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7FC6C04AB4 for ; Fri, 17 May 2019 09:00:23 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E35D20833 for ; Fri, 17 May 2019 09:00:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0E35D20833 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arndb.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 4552LX3LjSzDqV2 for ; Fri, 17 May 2019 19:00:20 +1000 (AEST) Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=209.85.160.196; helo=mail-qt1-f196.google.com; envelope-from=arndbergmann@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=arndb.de Received: from mail-qt1-f196.google.com (mail-qt1-f196.google.com [209.85.160.196]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4552Jx2YdGzDqRJ for ; Fri, 17 May 2019 18:58:57 +1000 (AEST) Received: by mail-qt1-f196.google.com with SMTP id f24so7094820qtk.11 for ; Fri, 17 May 2019 01:58:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=lUdOq+gx0nXT1b9GsinnX5s7hPrX6YoGJqW2/FU2LMQ=; b=oxAPqQk7T5Egxoz9CoOAfMimC4u8rFc+hqPXCmlLoFjD0P/gmH4d7sX+bsvQ0qYlhy G23BeiojtJup8dMH0hwyaiKXNfSlgyFvQnpGVXpefvhn2UCv5Ot/ZXwRm4i7f4jgVjLs SHrMXC8sVNDO6xyyzPQ2DlXo4Z7uF6/l0NBDcGAkhQzxBZdMIdgd0mlSCnl8Br6zE5zF e+2+BMU5xRsP7tk7TYhi8bmxS/PWBAINMp5n0DPc3+M3mxaLAkJhyKhp/rHSH/dYSLs/ Ps3so/XMxjMgXMvIwnTts/3ZgzSTHK7p74wCPVoSvfrcPOJWfQobr5ee7yG0tu6Gbk2+ zl9A== X-Gm-Message-State: APjAAAWvRHADu2j5doJB67+RU4RwsjkbbZ3Kup/pyHrHYaJ6u860L7I+ Ygo3fnpttNpNoCRmh8v/CjWnJyTQW41t+of5aQQ= X-Google-Smtp-Source: APXvYqwNxbxFr/vzS1RXQZDBTDKL/hVCvagOotGDm724YF5ym/q8RL/him/sN27hB8O1MZtVcEFf95bHEOo3m0FhXo8= X-Received: by 2002:ac8:2a05:: with SMTP id k5mr30063052qtk.304.1558083534352; Fri, 17 May 2019 01:58:54 -0700 (PDT) MIME-Version: 1.0 References: <20190515072747.39941-1-xiaowei.bao@nxp.com> <20190515072747.39941-2-xiaowei.bao@nxp.com> In-Reply-To: From: Arnd Bergmann Date: Fri, 17 May 2019 10:58:37 +0200 Message-ID: Subject: Re: [EXT] Re: [PATCH 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes To: Xiaowei Bao Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Roy Zang , Lorenzo Pieralisi , DTML , gregkh , Kate Stewart , linuxppc-dev , linux-pci , Linux Kernel Mailing List , Kishon , "M.h. Lian" , Rob Herring , Linux ARM , Philippe Ombredanne , Bjorn Helgaas , Leo Li , Shawn Guo , Shawn Lin , Mingkai Hu Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, May 17, 2019 at 5:21 AM Xiaowei Bao wrote: > -----Original Message----- > From: Arnd Bergmann > On Wed, May 15, 2019 at 9:36 AM Xiaowei Bao wrote: > > Signed-off-by: Xiaowei Bao > > --- > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++++++++++++++++= ++++++++ > > 1 files changed, 52 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm6= 4/boot/dts/freescale/fsl-ls1028a.dtsi > > index b045812..50b579b 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > @@ -398,6 +398,58 @@ > > status =3D "disabled"; > > }; > > > > + pcie@3400000 { > > + compatible =3D "fsl,ls1028a-pcie"; > > + reg =3D <0x00 0x03400000 0x0 0x00100000 /* co= ntroller registers */ > > + 0x80 0x00000000 0x0 0x00002000>; /* conf= iguration space */ > > + reg-names =3D "regs", "config"; > > + interrupts =3D , /* PME interrupt */ > > + ;= /* aer interrupt */ > > + interrupt-names =3D "pme", "aer"; > > + #address-cells =3D <3>; > > + #size-cells =3D <2>; > > + device_type =3D "pci"; > > + dma-coherent; > > + num-lanes =3D <4>; > > + bus-range =3D <0x0 0xff>; > > + ranges =3D <0x81000000 0x0 0x00000000 0x80 0x00= 010000 0x0 0x00010000 /* downstream I/O */ > > + 0x82000000 0x0 0x40000000 0x80 0x4000= 0000 0x0 0x40000000>; /* non-prefetchable memory */ > > Are you sure there is no support for 64-bit BARs or prefetchable memory? > [Xiaowei Bao] sorry for late reply, Thought that our Layerscape platform = has not added prefetchable memory support in DTS, so this platform has not = been added, I will submit a separate patch to add prefetchable memory suppo= rt for all Layerscape platforms. Ok, thanks. > Of course, the prefetchable PCIE device can work in our boards, because t= he RC will > assign non-prefetchable memory for this device. We reserve 1G no-prefetch= able > memory for PCIE device, it is enough for general devices. Sure, many devices work just fine, this is mostly a question of supporting = those devices that do require multiple gigabytes, or that need prefetchable memor= y semantics to get the expected performance. GPUs are the obvious example, but I think there are others (infiniband?). Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51239C04AB4 for ; Fri, 17 May 2019 08:59:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24F6A20833 for ; Fri, 17 May 2019 08:59:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="lIlC0Bko" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 24F6A20833 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arndb.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gcGUOIR0Ke14OexOw5GU1YD43pkVnk/O9WlZI6PY+F8=; b=lIlC0BkocJ5TRm yRzoc0osgYaddF4xsjUxivn+ZeTdk9iyFjHc35k2TcwBNu6ZY+DwP6vgfF0/AE60kwwBsPa9H1lci rqEMtpMWenj6j0CZIXz9ZcvqdeIChX7ZTn9aDa+ZdqvUOqZqJ6ZmVRXN6uf/kGN4bjXcG0Xv0At1Q W46din9wghAzwV6D5wwhl/6ASr0OPVtNFmEaWOR5bktbBPu/iaT5p77gtaLz+ctqzjDDVALbKvax0 NGegeTnksNH/lc6ElYh5QFCPQFTGZt2gYl3eAm0+bpWF8L+JZaxpRmAykcpSoQtkwMTobNGvGd5Qv PKbx9U/7C5UfkSfc9JTg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hRYhe-0005rW-SZ; Fri, 17 May 2019 08:58:58 +0000 Received: from mail-qt1-f194.google.com ([209.85.160.194]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hRYhb-0005qy-LR for linux-arm-kernel@lists.infradead.org; Fri, 17 May 2019 08:58:57 +0000 Received: by mail-qt1-f194.google.com with SMTP id d13so7143503qth.5 for ; Fri, 17 May 2019 01:58:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=lUdOq+gx0nXT1b9GsinnX5s7hPrX6YoGJqW2/FU2LMQ=; b=g4vOVRAC4ClHoyuGRn5yuoZbN3oufHG9jxTdP79m17C90ngTybh5lVJhOdGajOtnAV TwbguVwGPRmVnE5aVEnp/MLf9nnWv7fasP/UtQCG5Dk3upMhFun5EG6al7OSKTpatpF6 RzpdTuvTAgF5ewtLYlyZixdQ+vwKJta429kV/ZZe3AR3K2RS4B0vmsiZwX0YZ6kahx/d vRIw6VYlZZBqxLSHhqOhm8mdd4fRQWLsCSVcKo3fK5Ny1nQ0u7TPFWInIIGcYkDPVuN3 MH4J2jMPraoU0aqNfsirROh4bGW/woxktXN3iDp/DKgJhQqjqliqWu/+ho+24kuhf4Db L7Gw== X-Gm-Message-State: APjAAAUvfkkvrFE2Gu+zjDc5qEnSjwPS5pNUlZysI9MdDAc8zKsDFdny 7p4MPco0MA4vy3+YLpwcDcfUEs3Y3MRRs3rG9ZA= X-Google-Smtp-Source: APXvYqwNxbxFr/vzS1RXQZDBTDKL/hVCvagOotGDm724YF5ym/q8RL/him/sN27hB8O1MZtVcEFf95bHEOo3m0FhXo8= X-Received: by 2002:ac8:2a05:: with SMTP id k5mr30063052qtk.304.1558083534352; Fri, 17 May 2019 01:58:54 -0700 (PDT) MIME-Version: 1.0 References: <20190515072747.39941-1-xiaowei.bao@nxp.com> <20190515072747.39941-2-xiaowei.bao@nxp.com> In-Reply-To: From: Arnd Bergmann Date: Fri, 17 May 2019 10:58:37 +0200 Message-ID: Subject: Re: [EXT] Re: [PATCH 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes To: Xiaowei Bao X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190517_015855_788870_5C400F12 X-CRM114-Status: GOOD ( 17.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Roy Zang , Lorenzo Pieralisi , DTML , gregkh , Kate Stewart , linuxppc-dev , linux-pci , Linux Kernel Mailing List , Kishon , "M.h. Lian" , Rob Herring , Linux ARM , Philippe Ombredanne , Bjorn Helgaas , Leo Li , Shawn Guo , Shawn Lin , Mingkai Hu Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 17, 2019 at 5:21 AM Xiaowei Bao wrote: > -----Original Message----- > From: Arnd Bergmann > On Wed, May 15, 2019 at 9:36 AM Xiaowei Bao wrote: > > Signed-off-by: Xiaowei Bao > > --- > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 52 ++++++++++++++++++++++++ > > 1 files changed, 52 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > index b045812..50b579b 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > @@ -398,6 +398,58 @@ > > status = "disabled"; > > }; > > > > + pcie@3400000 { > > + compatible = "fsl,ls1028a-pcie"; > > + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ > > + 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ > > + reg-names = "regs", "config"; > > + interrupts = , /* PME interrupt */ > > + ; /* aer interrupt */ > > + interrupt-names = "pme", "aer"; > > + #address-cells = <3>; > > + #size-cells = <2>; > > + device_type = "pci"; > > + dma-coherent; > > + num-lanes = <4>; > > + bus-range = <0x0 0xff>; > > + ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */ > > + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ > > Are you sure there is no support for 64-bit BARs or prefetchable memory? > [Xiaowei Bao] sorry for late reply, Thought that our Layerscape platform has not added prefetchable memory support in DTS, so this platform has not been added, I will submit a separate patch to add prefetchable memory support for all Layerscape platforms. Ok, thanks. > Of course, the prefetchable PCIE device can work in our boards, because the RC will > assign non-prefetchable memory for this device. We reserve 1G no-prefetchable > memory for PCIE device, it is enough for general devices. Sure, many devices work just fine, this is mostly a question of supporting those devices that do require multiple gigabytes, or that need prefetchable memory semantics to get the expected performance. GPUs are the obvious example, but I think there are others (infiniband?). Arnd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel